Signal Descriptions
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
19-6
Freescale Semiconductor
E_MDIO
—
Management channel
serial data (100 base-T
only)
N10
I/O
2
E_RxCLK
—
Ethernet Rx clock
N7
I
E_RxD0
—
Ethernet Rx data
P7
I
E_RxDV
—
Ethernet Rx data valid
M7
I
E_Tx CLK
—
Ethernet Tx clock
L7
I
E_TxD0
—
Ethernet Tx data
N6
O
4
30
E_TxEN
—
Ethernet Tx enable
P8
O
2
30
E_TxER
—
Transmit error (100
base-T Ethernet only)
M10
O
2
30
FSC1/FSR1/
DFSC1
—
PLIC port 1 IDL FSR/GCI
FSC1/Generated frame
sync 1 Out
L4
I/O
2
30
GND
Ground
—
E[7,8]
F[7,8]
G[6–9]
H[6–9]
J[7,8]
Port D Cntl
Reg3
High Z
DCL0
URT1_CLK
—
Port 0 data clock/UART1
baud clock
J4
I
Port D Cntl
High Z
DIN0
URT1_RxD
—
IDL/GCI data in/UART1
Rx data
K1
I
Port D Cntl
High Z
–
URT1_
CTS
QSPI_
CS2
UART1 CTS/QSPI_CS2
K2
I/O
2
30
Port D Cntl
High Z
–
URT1_RTS
INT5
UART1 RTS/INT5
K3
I/O
2
30
Port D Cntl
High Z
DOUT0
URT1_TxD
—
IDL-GCI data Out/UART1
Tx data
K4
O
2
30
Port D Cntl
High Z
–
DIN3
INT4
Interrupt 4 input/PLIC
port 3 data input
P2
I
Port D Cntl
High Z
PWM_
OUT1
TOUT1
—
PWM output compare 1
/Timer 1 output compare
P5
O
4
30
Port D Cntl
High Z
PWM_
OUT2
TIN1
—
PWM output compare 2
/Timer 1 input
K6
I/O
4
30
INT1/
USB_WOR
—
Interrupt input 1/USB
wake-on-ring
M4
I
INT2
—
Interrupt input 1
P3
I
INT3
—
Interrupt input 3
N3
I
Table 19-1. Signal Descriptions Sorted by Function (Sheet 4 of 8)
Configured
by
(see notes)1
Pin Functions
Description
Map
BGA
Pin
I/O
Drive
(mA)
Cpf
0 (Reset)
1
2
3