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General Purpose I/O Module
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
17-3
17.2.1
Port A Control Register (PACNT)
PACNT is used to configure pins that source signals multiplexed with GPIO port A.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Field
PACNT15
PACNT14
PACNT13
PACNT12
PACNT11
PACNT10
PACNT9
PACNT8
Reset
0000_0000_0000_0000
R/W
Read/Write
15
14
13
12
11
10
98
76
54
32
10
Field
PACNT7PACNT6PACNT5PACNT4PACNT3PACNT2PACNT1PACNT0
Reset
0000_0000_0000_0000
R/W
Read/Write
Addr
MBAR + 0x0080
Figure 17-1. Port A Control Register (PACNT)
Table 17-3. PACNT Field Descriptions
Bits
Name
Description
31–30
PACNT15
Configure pin M3. If this pin is programmed to function as INT6, it is not available as a GPIO.
00 PA15
01 DGNT1
1x Reserved
29–28
PACNT14
Configure pin M2
00 PA14
01 DREQ1
1x Reserved
27–26
PACNT13
Configure pin L3
00 PA13
01 DFSC3
1x Reserved
25–24
PACNT12
Configure pin L2
00 PA12
01 DFSC2
1x Reserved
23–22
PACNT11
Configure pin L1
00 PA11
01 Reserved
10 QSPI_CS1
11 Reserved
21–20
PACNT10
Configure pin K5
00 PA10
01 DREQ0
1x Reserved
19–18
PACNT9
Configure pin J3
00 PA9
01 DGNT0
1x Reserved