General Purpose I/O Module
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
17-9
Table 17-8 provides the same information as
Table 17-7 but organized by function instead of register field.
7–6
PDCNT3
Configure pin K3.
00 High impedance
01 Reserved
10 URT1_RTS
11 INT5
5–4
PDCNT2
Configure pin K2.
00 High impedance
01 Reserved
10 URT1_CTS
11 QSPI_CS2
3–2
PDCNT1
Configure pin K1. The signal URT1_RxD is always internally connected to TIN3.
00 High impedance
01 DIN0
10 URT1_RxD/TIN3
11 Reserved
1–0
PDCNT0
Configure pin J4.
00 High impedance
01 DCL0
10 URT1_CLK
11 Reserved
Table 17-8. Port D Control Register Function Bits
PIN Number
PDCNTxx = 00
(Function 0b00)
PDCNTxx = 01
(Function 0b01)
PDCNTxx = 10
(Function 0b10)
PDCNTxx = 11
(Function 0b11)
J4
Pin is high Z
DCL0
URT1_CLK
—
K1
Pin is high Z
DIN0
URT1_RxD1/TIN3
1 URT1_RxD is always internally connected to timer 3 (TIN3).
—
K2
Pin is high Z
—
URT1_CTS
QSPI_CS2
K3
Pin is high Z
—
URT1_RTS
INT5
K4
Pin is high Z
DOUT0
URT1_TxD
—
P2
Pin is high Z
—
DIN3
INT4
P5
Pin is high Z
PWM_OUT1
TOUT1
—
K6
Pin is high Z
PWM_OUT2
TIN0
—
8-15
—
Table 17-7. PDCNT Field Descriptions (continued)
Bits
Name
Description (continued)