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Universal Serial Bus (USB)
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
12-7
12.3
Register Description and Programming Model
This section contains a detailed description of each register and its specific function.
12.3.1
USB Memory Map
The operation of the USB is controlled by writing control bytes into the appropriate registers.
Table 12-2is a memory map for USB registers. All of the registers are longword aligned even though they are not all
32 bits wide.
Table 12-2. USB Memory Map
Offset
[31:24]
[23:16]
[15:8]
[7:0]
0x1000
Reserved
USB Frame Number Register (FNR)
0x1004
Reserved
USB Frame Number Match Register (FNMR)
0x1008
Reserved
USB Real-time Frame Monitor Register (RFMR)
0x100C
Reserved
USB Real-time Frame Monitor Match Register (RFMMR)
0x1010
Reserved
USB Function Address
Register (FAR)
0x1014
USB Alternate Setting Register (ASR)
0x1018
USB Device Request Data1 Register (DRR1)
0x101C
USB Device Request Data2 Register (DRR2)
0x1020
Reserved
USB Specification Number Register (SPECR)
0x1024
Reserved
USB Endpoint 0 Status Register (EP0SR)
0x1028
USB Endpoint 0 IN Config Register (IEP0CFG)
0x102C
USB Endpoint 0 OUT Config Register (OEP0CFG)
0x1030
USB Endpoint 1 Configuration Register (EP1CFG)
0x1034
USB Endpoint 2 Configuration Register (EP2CFG)
0x1038
USB Endpoint 3 Configuration Register (EP3CFG)
0x103C
USB Endpoint 4 Configuration Register (EP4CFG)
0x1040
USB Endpoint 5 Configuration Register (EP5CFG)
0x1044
USB Endpoint 6 Configuration Register (EP6CFG)
0x1048
USB Endpoint 7 Configuration Register (EP7CFG)
0x104C
USB Endpoint 0 Control Register (EP0CTL)
0x1050
Reserved
USB Endpoint 1 Control Register (EP1CTL)
0x1054
Reserved
USB Endpoint 2 Control Register (EP2CTL)
0x1058
Reserved
USB Endpoint 3 Control Register (EP3CTL)
0x105C
Reserved
USB Endpoint 4 Control Register (EP4CTL)
0x1060
Reserved
USB Endpoint 5 Control Register (EP5CTL)
0x1064
Reserved
USB Endpoint 6 Control Register (EP6CTL)
0x1068
Reserved
USB Endpoint 7 Control Register (EP7CTL)