參數(shù)資料
型號： MC68HC705PD6
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 132/165頁
文件大?。?/td> 841K
代理商： MC68HC705PD6
July 7, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05PD6
CLOCK DISTRIBUTION
MOTOROLA
REV 1.1
8-9
8.5.2 RTC Alarm Registers
There are three locations associated with the alarm registers as shown.
The ALF bit in the RTC Status register is set when the contents of the RTC Alarm
registers matches the contents of the RTC Time registers.
8.5.3 RTC Status Register
There are three interrupts associated with the RTC, their ags are in the RTC
Status register ($39), and their respective enable bits are the RTC Control register
($3A).
RTCF
When this bit is set, real time clock interrupts CPU once a day. After serving
this interrupt, it is the user’s responsibility to clear this bit, otherwise the CPU
will keep on serving this once a day interrupt when a new RTC interrupt occurs
(even there is no once a day interrupt occurs). This bit is cleared by writing a 1
to it.
W
R
reset
0
7
00
54
0
0000
6
3210
0
HOURA4
0
HOURA3
HOURA2
HOURA0
HOURA1
HOURA
$0036
W
R
reset
0
7
00
54
0
0000
6
3210
0
MINA4
MINA5
MINA3
MINA2
MINA0
MINA1
MINA
$0037
W
R
reset
0
7
00
54
0
0000
6
3210
0
SECA4
SECA5
SECA3
SECA2
SECA0
SECA1
SECA
$0038
W
R
reset
0
7
00
54
0
0000
6
3210
0
SECF
RTCF
ALF
RTCS
$0039
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