參數(shù)資料
型號(hào): MC145170
廠商: Motorola, Inc.
英文描述: PLL Frequency Synthesizer(PLL頻率發(fā)生器)
中文描述: 鎖相環(huán)頻率合成器(PLL頻率發(fā)生器)
文件頁(yè)數(shù): 9/14頁(yè)
文件大?。?/td> 173K
代理商: MC145170
9
MOTOROLA RF/IF APPLICATIONS INFORMATION
To analyze the circuit for spur amplitude on the output of
the VCO, the simulation must contain adequate simulation
time. In addition this simulation must contain data for stable
operation only and must be of sufficient resolution. At least
three samples (four is recommended), per cycle should be
made. This is achieved by setting step ceiling in the analysis
menu. For example, if the VCO output is 12 MHz, the step
ceiling should be set to about 10 ns. 2.5 ms provide an
adequate number of samples for a clean display.
To insure that only stable data is obtained from the
simulation, the initial condition settings are set to reflect the
voltages present after the circuit is stabilized. These can be
calculated or the simulation run long enough to stabilize and
the values measured using a marker. There will be some
degree of uncertainty for the values at the phase detector
output since these contain a significant amount of the
100 KHz switching components. An approximate value is
sufficient as the print delay can be used to eliminate any
residual settling. Setting IC = 3 V for all three initial conditions
and using a print delay of 0.5 ms, sufficient samples are
obtained for the display. The high frequency output of the
VCO is measured and the FFT function is used to obtain a
time/amplitude plot. Limiting the span to
±
150 KHz with
logarithmic vertical axis, the display is shown in Figure 18.
The amplitude of the spur at 12.1 MHz is measured as
0.454 mv. The maximum amplitude of the primary is 0.954 V
giving a suppression of 66 db for this implementation.
Figure 18.
1.0 V
1.0 V
11.90
11.85
11.95
12.15
12.10
FREQUENCY (MHz)
12.00
12.05
100 V
10 mV
Circuit Analysis
PSpice may also be used for analyzing existing circuits.
By measuring conditions in operating circuits and comparing
the results to simulations of the schematic representation of
the circuit, values for parameters such as parasitic
capacitance and inductance can be obtained.
If the circuit in Figure 11 is simulated and the output of the
phase detector, PDout, is displayed, the result will be as is
shown in Figure 19.
400
400.05
400.1
TIME ( s)
Figure 19.
V
5.0
4.0
3.0
2.0
1.0
0
400.15
400.2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC145170D1 制造商: 功能描述: 制造商:Motorola Inc 功能描述: 制造商:undefined 功能描述:
MC145170D2 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
MC145170D2R2 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
MC145170DT2 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
MC145170DT2R2 功能描述:IC SERIAL PLL FREQ SYNTH 16TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*