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參數(shù)資料
| 型號(hào)： | MC145170 |
| 廠商： | Motorola, Inc. |
| 英文描述： | PLL Frequency Synthesizer(PLL頻率發(fā)生器) |
| 中文描述： | 鎖相環(huán)頻率合成器（PLL頻率發(fā)生器） |
| 文件頁(yè)數(shù)： | 7/14頁(yè) |
| 文件大小： | 173K |
| 代理商： | MC145170 |
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7
MOTOROLA RF/IF APPLICATIONS INFORMATION
R1 = (R1+R2)–R2 = 20 k ohm.
If Cc is chosen such that Cc = 4/(R1wRC) where wRC is
the filter cutoff frequency, then
Cc ~ 820pf.
(refer to the AN1207 application note; formulas 8, 9 and 10.)
If additional filtering is needed, equation 11 from the
AN1207 application note may be used to determine the
capacitance value for an additional filter element. If the
resistance of R1 is chosen as 10 k, the value of C1 is
C1 = 1/wRC*R1 ~ 390pf.
V2
0
0
5 V
+
–
0
M1
V1
+
–
Figure 13.
Simulation
The Phase Detector used in Figure 11 is the version
shown in Figure 8. Before simulating, the delay should be set
to obtain the desired minimum pulse width and the output
transistors should be configured for the correct NRD, NRS
and M. The VCO model is shown in Figure 10 and is
configured for this example.
The transistor characteristics can be examined by running
a quick simulation of the circuit shown in Figure 13. Access
the attributes menu for the NMOS transistor and select NRD
or NRS. Set both values to 4/66 (6.0606e–2). Set VPULSE to
ramp from zero to 5 V. Place a current marker on the drain of
the NMOS transistor and simulate (1 ms is adequate). The
result is shown in Figure 14.
0
0.1
0.2
0.3
0.4
1.0
Time (ms)
Figure 14.
A
500
400
300
200
100
0
0.5
0.6
0.7
0.8
0.9
M was left at the default setting of one for this run. By
specifying a specific number for M, the current shown in
Figure 14 will be multiplied by this number. For example, if we
set M at three, the transfer characteristics will be as shown in
Figure 15.
0
0.1
0.2
0.3
0.4
1.0
Time (ms)
Figure 15.
m
1.4
0.8
0.6
0.4
0.2
0
0.5
0.6
0.7
0.8
0.9
1.2
1.0
The desired output drive can now be obtained by adjusting
the value for M. The same procedure is used for the PMOS
transistor except the value for NRD and NRS is 4/210
(1.9048e–2), and M should be approximately twice that used
for the NMOS transistor for a balanced output.
Before beginning the simulation, the three initial conditions
(IC= ), should be set and reference oscillator should be set.
The initial condition values can be set to zero for an initial
simulation then reset later to the values desired for later
simulations. The reference oscillator, V2, is a VPULSE
function with V1=zero, V2=5 V, tr, tf, pw and per set to
produce a 100 KHz square wave. By referring to Figure 12,
we can expect the control voltage at lock to be approximately
2 V. Since the linear portion of the VCO characteristics curve
is approximately 8 MHz to 15 MHz, we are interested in the
circuit activity for control voltages between 1.5 V and 3.5 V.
Except for examining performance at startup, we will set IC to
some value between these values.
The exact value of the initial condition depends of what
condition is being simulated. For example, suppose we wish
to observe the loop performance for the VCO output stepping
from 10 MHz to 12 MHZ (the range of operation we have
chosen). First, we modify the VCO model to change N to 120,
set each IC flag to 2 V and run the simulation. The value 2 V
is approximately the control voltage required to produce a
VCO output of 10 MHz. The initial conditions will then reflect
a beginning condition of 10 MHz followed by a step to
12 MHz. Figure 16 shows the 1.5 ms simulation run.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC145170D1 | 制造商: 功能描述: 制造商:Motorola Inc 功能描述: 制造商:undefined 功能描述: |
| MC145170D2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170D2R2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2R2 | 功能描述:IC SERIAL PLL FREQ SYNTH 16TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類(lèi)型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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