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參數(shù)資料
| 型號： | MB86967PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| 中文描述： | 1 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP80 |
| 封裝： | PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 45/129頁 |
| 文件大小： | 1499K |
| 代理商： | MB86967PFV |
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45
MB86967
(7) DLCR6: Control Register 1
DLCR6 sets the MB86966 operation modes.
(Continued)
* :This register is accessible only for the device initialization.
Bit 7
Bit 6
100NS/
150NS
0
Bit 5
Bit 4
Bit 3
TX BUF
SIZE 1
0
Bit 2
TX BUF
SIZE 0
1
Bit 1
BUF
SIZE 1
1
Bit 0
BUF
SIZE 0
0
Read/Write
ENA DLC
SB/SW
BB/BW
Initial Value
1
1
1
Bit no.
7
Bit name
ENA DLC
(Enable Data
Link Controller)
Operation
Read/Write
Value
0
Function
When 0 is written to this bit, the MB86967 is ready for
transmitting and receiving. When this bit is 0, the node ID
register and multicast address register cannot be accessed.
The data link controller and buffer manager in the MB86967
are initialized and both the transmitter and receiver buffers are
also initialized.
Sets cycle time of external SRAM to 150 ns
Sets cycle time of external SRAM to 100 ns.
In this case, use SRAM with an access time of 80 ns or less.
Selects width of system data bus
1
6
100NS/150NS
(SRAM Cycle
Time Select)
Read/Write
0
1
5
SB/SW
(System Bus
Width Select)
Read/Write
—
PC Card Mode
When 1 is written to bit 5 (IOIS8) of the CCR1, the SB/-SW
bit is set to 1, placing the system data bus in the byte
transfer mode. When 0 is written, the SB/-SW bit is set to 0,
placing the system data bus in the word transfer mode.
In the PC card mode, writing to the SB/-SW bit is performed
by CCR1. Writing from DLCR6 does not affect bit 5.
General-purpose Bus Mode
The reversed value of the SB/SW bit is output to the
external pin SB/SW.
The width of the buffer memory data bus is fixed to 8 bits. The
read value of this bit is always 1.
Not affected
Sets size of transmitter buffer.
4
BB/BW
(Buffer Memory
Bus Width)
Read
1
Write
—
—
3 and 2 TX BUF SIZE 1
TX BUF SIZE 0
(Transmitter
Buffer Size)
Read/Write
SB/SW
0
1
System Data Bus
16 bit
8 bit
TX BUF SIZE
1
0
0
1
1
Bank
Capacity
Bank
Count
Buffer
Capacity
0
0
1
0
1
2 Kbyte
2 Kbyte
4 Kbyte
8 Kbyte
1
2
2
2
2 Kbyte
4 Kbyte
8 Kbyte
16 Kbyte
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