參數(shù)資料
型號: MB86967PFV
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces
中文描述: 1 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁數(shù): 105/129頁
文件大?。?/td> 1499K
代理商: MB86967PFV
105
MB86967
(16)Single DMA Access Timing
(V
DD
= +5 V
±
5%, GND
= 0 V, Ta = 0
°
C to +70
°
C)
Parameter
Symbol
Value
Typ.
Unit
Min.
Max.
Delay time for DREQ negate output (from DMACK
assert)
Delay time for DREQ assert output (from DMACK
negate)
EOP pulse width
Delay time for EOP assert input
Setup time for EOP negate
Setup time for DMACK
Hold time for DMACK input
t
1
21
ns
t
2
19
ns
t
3
t
4
t
5
t
6
t
7
10
3
3
0
3
ns
ns
ns
ns
ns
DREQ
DMACK
IOR, IOW
EOP
*
t
4
t
3
t
5
t
7
t
6
t
1
t
2
EOP
*
* : EOP input allows the values of EOP/EOP register values for bit 1 of DLCR7 to toggle between EOP (active high) and
EOP (active low).
Note: IOCHRDY signal timing is identical as that of bus timing.
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