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參數(shù)資料
| 型號： | MB86967PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | LAN Controller with PC Card, ISA Bus, and General-purpose Bus Interfaces |
| 中文描述： | 1 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP80 |
| 封裝： | PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 43/129頁 |
| 文件大?。?/td> | 1499K |
| 代理商： | MB86967PFV |
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43
MB86967
(6) DLCR5: Receive Mode Register
DLCR5 sets the receiver operation mode, and displays the status of the receiver buffer memory.
Bit 7
TST2
0
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Read
Write
BUF EMP
—
1
ACPT
BAD PKT
ADD
SIZE
ENA SRT
PKT
ENA
RMT RST
AM1
AM0
Initial Value
0
0
0
0
0
1
Bit no.
7
Bit name
TST2
(Chip Test 2)
Operation
Read/Write
Value
—
Function
This is a chip test bit. Always write 0 to this bit at writing to
DLCR5. Writing 1 to this bit is prohibited during normal
operation.
Indicates valid data remaining in receiver buffer memory
Indicates no valid data in receiver buffer memory
Not affected
If the received packet has short packet, alignment, and CRC
errors, it is discarded and is not transferred to the receiver
buffer.
A packet with short packet, alignment, and CRC errors is
transferred to the receiver buffer like a normally-received
packet.
Compares destination addresses of receive packet and ID
addresses of node for match at all 6 bytes (48 bits)
Compares destination addresses of received packet and ID
addresses of node for match only at upper byte and 5 bytes
(40 bits)
A packet of more than 60 bytes and less than 2 Kbytes can be
received.
A packet of more than 6 bytes and less than 2 Kbytes can be
received.
The value of this bit is ignored when bit 5 (ACPT BAD PKT) is
set.
The remote reset packet is not detected.
Checks whether value of data length field in receive packet is
0900
H
Selects node ID address match detect mode at packet
receiving (Tables 3 and 4)
6
BUF EMP
(Buffer Empty)
Read
0
1
—
0
Write
5
ACPT BAD PKT
(Bad Packet
Receive)
Read/Write
1
4
ADD SIZE
(Address Size)
Read/Write
0
1
3
ENA SRT PKT
(Enable Short
Packet Receive)
Read/Write
0
1
2
ENA RMT RST
(Enable Remote
Reset)
Read/Write
0
1
1 and 0 AM1, AM0
(Address
Match Mode)
Read/Write
—
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