參數(shù)資料
型號(hào): MAX14830ETM+
廠(chǎng)商: MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi): 微控制器/微處理器
英文描述: SERIAL COMM CONTROLLER, QCC48
封裝: 7 X 7 MM, ROHS COMPLIANT, TQFN-48
文件頁(yè)數(shù): 41/68頁(yè)
文件大?。?/td> 2356K
代理商: MAX14830ETM+
MAX14830
Quad Serial UART with 128-Word FIFOs
and Internal Oscillator
46
Bit 2: GPIAddr
The GPIAddr bit, when set, enables that the four GPIO_ inputs are used in conjunction with XOFF2 for the definition of
a special character. This can be used, for example, for defining the address of a RS-485 slave device through hard-
ware. The GPIO_ input logic levels define the four LSBs of the special character, while the four MSBs are defined by
the XOFF2[7:4] bits. If GPIAddr is set, the contents of the XOFF2[3:0] bits are neglected. In this case, the XOFF2[3:0]
bits, when read, also do not reflect the logic on GPIO_.
Bit 1: AutoCTS
The AutoCTS bit enables automatic CTS flow control by which the transmitter stops and starts sending data depend-
ing on the logic state at the CTS_ input. See the Auto Hardware Flow Control section for a description of AutoCTS
flow control. Logic changes at the CTS_ input result in an ISR[7]: CTSInt interrupt. The transmitter must be turned off,
(MODE1[1] = 1), before AutoCTS is enabled.
Bit 0: AutoRTS
The AutoRTS bit enables automatic RTS flow control by which the MAX14830 sets its RTS_ output dependent on the
Receive FIFO fill level. The FIFO thresholds at which RTS_ changes state are set in FlowLvl. See the Auto Hardware
Flow Control section for more information.
Table 4. SwFlow_ Truth Table
X = Don’t care.
SwFlow3
SwFlow2
SwFlow1
SwFlow0
DESCRIPTION
RECEIVER FLOW
CONTROL
TRANSMITTER FLOW
CONTROL/SPECIAL
CHARACTER
DETECTION
0
No flow control. No character detection.
0
X
No receiver flow control.
1
0
X
Transmitter generates XON1, XOFF1.
0
1
X
Transmitter generates XON2, XOFF2.
1
X
Transmitter generates XON1, XON2, XOFF1, and XOFF2.
X
0
No transmitter flow control.
X
1
0
Receiver compares XON1 and XOFF1 and controls the transmitter accord-
ingly. XON1 and XOFF1 special character detection.
X
0
1
Receiver compares XON2 and XOFF2 and controls the transmitter accord-
ingly. XON2 and XOFF2 special character detection.
X
1
Receiver compares XON1, XON2, XOFF1, and XOFF2 and controls the
transmitter accordingly. XON1, XON2, XOFF1, XOFF2 special character
detection.
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