
LCD CONTROLLER with VRAM
M66273FP
MITSUBISHI <DIGITAL ASSP>
Ver.3.1 Dec,1999
(2-3) For use of 16bit MPU - 2 (For MPU controlling byte access with LWR and HWR, set as follow: MPUSEL=BHE="H", A<0>="L")
COMBINATIONS OF CONTROL INPUT PINS ON THE MPU INTERFACE
(1) Access to the control register
For data, D<7:0> is used.
(Only when 16bit MPU is used to control the LCD module built-in system, D<15:0> is used for data.)
Operation
IOCS
L
L
H
H
H
LWR
L
H
L
H
X
RD
H
L
H
L
X
H
H
L
L
H
Invalid
Writes to control register
Reads from control register
Writes to control register
Reads from control register
(2-2) For use of 16bit MPU - 1 (For MPU controlling byte access with A<0> and BHE, set as follow: MPUSEL=HWR="H")
A<0>
L
BHE
L
MCS
L
HWR LWR
H
L
H
L
H
L
H
L
H
X
H
H
Upper byte
Write
Invalid
Write
Invalid
Lower byte
Write
Invalid
Invalid
Invalid
H
L
Invalid
Write
H
X
X
H
Invalid
16bit
Upper 8bit
A<0>
BHE
H
MCS
L
HWR LWR
L
L
H
L
H
X
L
H
H
Write
Write
Invalid
Invalid
X
H
MCS
H
X
L
Odd address Even address
Invalid
Read
Invalid
A<0>
RD
L
H
H
L
X
L
Read
Invalid
Invalid
BHE
H
8bit
Tables 1 to 6 show input setting conditions for access to the control register and VRAM from the MPU side.
(2) Write to VRAM
(2-1) For use of 8bit MPU (Set as follow: MPUSEL="L", BHE=HWR="H")
(3-2) For use of 16bit MPU (Set as follow: MPUSEL="H")
Notes : Combinations except for the above cause malfunction. Be sure to make settings according to the above combinations.
: X=either
"
L
"
or
"
H
"
MCS
L
H
A<0>
X
RD
L
H
X
H
Read
Invalid
BHE
X
16bit
MPU
SEL
L
A<0>
BHE
MCS
HWR LWR
L
H
L
H
X
X
H
L
H
X
H
Odd address Even address
Invalid
Write
Write
Invalid
Invalid
Invalid
Valid data bus width
for MPU
8bit
Table-1
Table-2
Table-3
Table-4
Table-5
Table-6
Lower 8bit
Invalid
Upper byte
Lower byte
Write
Invalid
Write
Invalid
16bit
Upper 8bit
Lower 8bit
(3) Read from VRAM
(3-1) For use of 8bit MPU (Set as follows: MPUSEL="L", BHE="H")
Upper byte
Lower byte
Read
Invalid
6
MCS
A<14:0>
0000
H
to 009E
H
0000
H
to 009E
H
5000
H
to 509E
H
5000
H
to 509E
H
IOCS
control
MCS
control
Valid data bus width
for MPU
Valid data bus width
for MPU
Valid data bus width
for MPU
Valid data bus width
for MPU
MPU
SEL
MPU
SEL
MPU
SEL
MPU
SEL