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參數(shù)資料
| 型號： | M66273FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | LCD CONTROLLER with VRAM |
| 中文描述： | 液晶顯示控制器顯存 |
| 文件頁數(shù)： | 19/34頁 |
| 文件大?。?/td> | 297K |
| 代理商： | M66273FP |
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LCD CONTROLLER with VRAM
M66273FP
MITSUBISHI <DIGITAL ASSP>
Ver.3.1 Dec,1999
Description of cycle steal control function
The M66273 provides the cycle steal control function to efficiently carry
out one-line data processing.
In the display section where display data requires to be transferred from
built-in VRAM to the LCD side, this function adopts a cycle steal system
to gain access to the MPU while putting the MPU in WAIT.
In a horizontal synchronous section where display data does not
require to be transferred from VRAM to the LCD side, this function does
not output WAIT in the section to avoid reducing the MPU throughput.
However, since malfunction is restrained near the termination of
horizontal synchronous section, the CSW register should be surely set
to provide a period of access by the cycle steal system.
(It need to set at least 1 cycle of MPU bus timing.)
LP
VD<3:0>
CSE
Example) Assuming 320 x 240 dot LCD in display mode .
1
1 horizontal line
Set with the CR register
Section where data requires to be
transferred from display section = VRAM to
the LCD side (cycle steal system)
Set with the LPW register
Section where data does not require to be
transferred from horizontal section =
VRAM to the LCD side
Set with the CSW register
Provides a timing for
setting CSE to òHó
to put MPU in WAIT.
Gains access at the
MPU bus timing without
putting MPU in WAIT.
Putting MPU in WAIT according
to cycle steal access.
Output when 1-line
display data is
comp-letely sent.
Output each time
one piece of display
data is transferred.
4bit transfer
CP
1
2
3
78
79
80
1
WAIT
19
Without putting
MPU in WAIT
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| M66282FP(#TB0T) | 制造商:Renesas Electronics Corporation 功能描述: |
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