- 您現(xiàn)在的位置：買賣IC網 > PDF目錄384643 > M66273FP (Mitsubishi Electric Corporation) LCD CONTROLLER with VRAM PDF資料下載
參數(shù)資料
| 型號： | M66273FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | LCD CONTROLLER with VRAM |
| 中文描述： | 液晶顯示控制器顯存 |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 297K |
| 代理商： | M66273FP |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
LCD CONTROLLER with VRAM
M66273FP
MITSUBISHI <DIGITAL ASSP>
Ver.3.1 Dec,1999
· Cycle steal system
Cycle steal system is interact method of transforming display data for
LCD from VRAM and accessing VRAM from MPU on the basic
cycle (MAINCLK) of internal operation.
Basic timing is two clocks of MAINCLK, and assign first clock to the
access from MPU to VRAM and second clock to the transfer of
display data from VRAM to LCD.
In accessing VRAM from MPU, output WAIT. In case of fixed
WAITCNT input, change WAIT to "L" at the timing of the falling edge
of overlapping with MCS and RD or LWR / HWR,and in case of
using WAITCNT input, change WAIT to "L" at the timing of the falling
edge of WAITCNT on MCS="L", And return to "H" at synchronizing
with rising edge of MPUCLK after internal processing.
For the cycle steal system, this IC provides a cycle steal control
function to improve data transfer efficiency in a line. This func-tion
gains access with the cycle steal system by taking WAIT for MPU
during the display term with necessity for the display data transfer
from built-in VRAM to LCD. On the other side, it does not output
WAIT for keeping throughput of MPU during horizontal synchronous
term (idle running term) with no necessity for the display data
transfer from VRAM to LCD side.
In detail,refer to "Description of cycle steal".
· Output to LCD side
LCD display data VD<7:0> is output in parallel per 4 bits or 8 bits in
synchronization with the rising edge of CP.
Pin VD<n:0> differs depending on the display mode.
When display data for a line has been sent, LP outputs data in
synchronization with the falling edge of MAINCLK.
The IC enables adjustment to an optimum value of the frame
frequency as requested from the LCD PANEL side by adjusting pulse
width of LP with the LPW register value.
FLM is output when the display data for the first line has been sent.
M output is an LCD alternating signal for driving LCD with alternating
current.
M output cycles can be set in lines with the M output cycle variable
register and is available to prevent LCD from deterioration.
· Gray scale display function
Gray scale display can assign 2-bit VRAM data to a picture element
of LCD display to show the display density at four levels.
Gray scale display pattern tables 0 and 1 (4 x 4 matrix x 16 patterns x
2 medium gray scale), consisting of SRAM of 64 bytes in total, can
set any gray scale display pattern.
In detail,refer to "Description of gray scale function".
· Application to reflective color type LCD
The above gradation display function is available to control about four
display colors on the reflective color type LCD with ECB (Electrically
Controlled Birefringence).
OUTLINE
The M66273 is a graphic display only controller for displaying a dot
matrix type STN-LCD.
· LCD display mode
It is capable of displaying six types of LCD by combining the panel
configuration, binary/gray scale, LCD display data bus width.
· Control register
When accessing the control register from MPU, use pins IOCS,
LWR, RD, A<7:0> and D<7:0>, or MCS, LWR, RD,A<14:0> and
D<7:0> (However, use D<15:0> only when 16-bit MPU controls the
LCD module built-in support function.)
Refer to Table-1, setting of control input.
The IC contains the following registers as control registers.
· VRAM
This IC has a built-in 19200-byte VRAM which is equivalent to two
screens of 320 x 240 dots LCD.
When accessing VRAM from MPU, use pins MCS, HWR, LWR,
RD, BHE, A<14:0> and D<15:0>.
Use of MPUSEL input can support both 8/16 bit MPU.
Refer to table-2 to 6, VRAM specifications for 8/16 bit MPU and input
setting in access.
The VRAM address settable range is restricted depending on the
panel configuration, as follows.
Panel
configuration
Binary/
gray scale
LCD display
data
Single
scan
Binary
4bit
8bit
4bit
8bit
Displayable LCD
size
Equivalent to 640
x 240
4bit
Equivalent to 320 x
240 x 2 screens
Equivalent to 320 x
120 x 2 screens
4bit
Display
mode
1
2
3
4
5
6
Operation control
Supporting LCD module built-in type
Gray scale pattern table
R1 to R11
R12 to 14 or R15 to 16
R17 to R80
VRAM address settable range
· When single scan mode
·A<14:0>=0000 to 4AFF
H
--- 19200 byte
0000
H
4AFF
H
VRAM
0000
H
VRAM for the 1st screen
257F
H
2580
H
VRAM for the 2nd screen
4AFF
H
· When dual scan mode
·For the 1st screen --- A<14:0>=0000 to 257F
H
--- 9600 byte
·For the 2nd screen --- A<14:0>=2580 to 4AFF
H
--- 9600 byte
Single scan
4-bit transfer
VD<3:0>
VD<7:0>
VD<3:0>
VD<7:4>
Display mode
3
2
4
5
6
Dual
scan
Gray scale
Binary
Equivalent to 320
x 240
Dual scan
8-bit transfer
4-bit transfer
Gray scale
5
1
相關PDF資料 |
PDF描述 |
|---|---|
| M66280FP | 5120 x 8-BIT LINE MEMORY |
| M66281FP | 5120 x 8-BIT x 2 LINE MEMORY |
| M66282FP | 8192 x 8-BIT LINE MEMORY |
| M66290AFP | USB DEVICE CONTROLLER |
| M66290AGP | USB DEVICE CONTROLLER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M66280FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:5120 x 8-BIT LINE MEMORY |
| M66280FP(#TB0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66281FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:5120 × 8-Bit × 2 Line Memory |
| M66282FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
| M66282FP(#TB0T) | 制造商:Renesas Electronics Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。