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參數(shù)資料
| 型號： | M38C2XMX |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁數(shù)： | 32/63頁 |
| 文件大小： | 1000K |
| 代理商： | M38C2XMX |
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32
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
[Transmit Buffer Register/Receive Buffer Reg-
ister (TB/RB)]
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer is write-only and the
receive buffer is read-only. If a character bit length is 7 bits, the MSB
of data stored in the receive buffer is
“
0
”
.
[Serial I/O Status Register (SIO1STS, SIO2STS)]
The read-only serial I/O status register consists of seven flags (bits 0
to 6) which indicate the operating status of the serial I/O function and
various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to
“
0
”
when the receive
buffer register is read.
If there is an error, it is detected at the same time that data is trans-
ferred from the receive shift register to the receive buffer register,
and the receive buffer full flag is set. A write to the serial I/O status
register clears all the error flags OE, PE, FE, and SE (bit 3 to bit 6,
respectively). Writing
“
0
”
to the serial I/O enable bit SIOE (bit 7 of the
serial I/O control register) also clears all the status flags, including
the error flags.
All bits of the serial I/O status register are initialized to
“
0
”
at reset,
but if the transmit enable bit (bit 4) of the serial I/O control register
has been set to
“
1
”
, the transmit shift completion flag (bit 2) and the
transmit buffer empty flag (bit 0) become
“
1
”
.
[Serial I/O Control Register (SIO1CON, SIO2CON)]
The serial I/O control register consists of eight control bits for the
serial I/O function.
[UART Control Register (UART1CON, UART2CON)]
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set the
data format of an data transfer and one bit (bit 4) which is always
valid and sets the output structure of the P5
5
/T
X
D
1
[P3
2
/TxD
2
] pin.
[Baud Rate Generator (BRG1, BRG2)]
The baud rate generator determines the baud rate for serial transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate generator.
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