22
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
TIMERS
8-Bit Timer
The 38C2 group has four built-in timers : Timer 1, Timer 2, Timer 3,
and Timer 4.
Each timer has the 8-bit timer latch. All timers are down-counters.
When the timer reaches
“
00
16
,
”
the contents of the timer latch is
reloaded into the timer with the next count pulse. In this mode, the
interrupt request bit corresponding to that timer is set to
“
1.
”
The count can be stopped by setting the stop bit of each timer to
“
1.
”
G
Frequency Divider For Timer
Timer 1, timer 2, timer 3 and timer 4 have the frequency divider for
the count source. The count source of the frequency divider is switched
to X
IN
or X
CIN
by the CPU mode register. The frequency divider is
controlled by the 3-bit register. The division ratio can be selected
from as follows;
1/1, 1/2, 1/16, 1/32, 1/64, 1/128, 1/256, 1/1024 of f(X
IN
) or f(X
CIN
).
G
Timer 1, Timer 2
The count sources of timer 1 and timer 2 can be selected by setting
the timer 12 mode register.
When f(X
CIN
) is selected as the count source, counting can be per-
formed regardless of X
CIN
oscillation. However, when X
CIN
is stopped,
the external pulse input from X
CIN
pin is counted. Also, by the timer
12 mode register, each time timer 2 underflows,
the signal of which
polarity is inverted can be output from P3
6
/T
2OUT
pin.
At reset, all bits of the timer 12 mode register are cleared to
“
0,
”
timer
1 is set to
“
FF
16
,
”
and timer 2 is set to
“
01
16
.
”
When executing the STP instruction, previously set the wait time at
return.
G
Timer 3, Timer 4
The count sources of timer 3 and timer 4 can be selected by setting
the timer 34 mode register. Also, by the timer 34 mode register, each
time timer 3 or timer 4 underflows,
the signal of which polarity is
inverted can be output from P5
2
/T
3OUT
pin or P5
3
/T
4OUT
pin.
G
Timer 3 PWM
0
Mode, Timer 4 PWM
1
Mode
A PWM rectangular waveform corresponding to the 10-bit accuracy
can be output from the P5
2
/PWM
0
pin and P5
3
/PWM
1
pin by set-
ting the timer 34 mode register and PWM01 register (refer to Figure
21).
The
“
n
”
is the value set in the timer 3 (address 0022
16
) or the timer
4 (address 0023
16
). The
“
ts
”
is one period of timer 3 or timer 4
count source.
One output pulse is the short interval. Four output pulses are the
long interval.
“
H
”
width of the short interval is obtained by n
ts.
However, in the long interval,
“
H
”
width of output pulse is extended
for ts which is set by the PWM01 register (address 0024
16
).