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| 型號(hào)： | M38C2XMX |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 20/63頁(yè) |
| 文件大?。?/td> | 1000K |
| 代理商： | M38C2XMX |
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20
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Key Input Interrupt (Key-on Wake-Up)
A key input interrupt request is generated by detecting the falling
edge from any pin of ports P0
0
–
P0
3
, P5
4
–
P5
7
that have been set to
input mode. In other words, it is generated when AND of input level
goes from
“
1
”
to
“
0
”
. An example of using a key input interrupt is
shown in Figure 17, where an interrupt request is generated by press-
ing one of the keys consisted as an active-low key matrix which in-
puts to ports P5
4
–
P5
7
.
Fig. 17 Connection example when using key input interrupt and ports P0 and P5 block diagram
Key input control
register =
“
1
”
K
r
e
e
y
i
s
i
n
t
e
p
r
u
=
t
c
“
o
1
n
”
t
r
o
l
g
K
r
e
e
y
i
s
i
n
t
e
p
r
u
=
t
c
“
o
1
n
”
t
r
o
l
g
Key input control
register =
“
1
”
Key input control
register =
“
1
”
Key input control
register =
“
1
”
Key input control
register =
“
1
”
Port P5
4
latch
Port P5
direction register =
“
0
”
Port P5
5
latch
P
d
o
i
r
e
t
c
P
t
i
5
5
o
r
n
r
e
g
i
s
t
e
r
=
“
0
”
Port P5
6
latch
Port P5
6
direction register =
“
0
”
Port P5
7
latch
d
P
i
o
e
r
c
t
t
i
P
o
5
7
n
r
r
e
g
i
s
t
e
r
=
“
0
”
P
l
a
o
r
t
h
P
0
0
t
c
Port P0
0
direction register =
“
1
”
Port P0
1
latch
Port P0
direction register =
“
1
”
Port P0
2
latch
P
d
o
i
r
e
t
c
P
t
i
0
2
o
r
n
r
e
g
i
s
t
e
r
=
“
1
”
P
l
a
o
r
t
h
P
0
3
t
c
Port P0
3
direction register =
“
1
”
Key input control
register =
“
1
”
P
5
4
i
n
p
u
t
P
5
5
i
n
p
u
t
P5
6
input
P
5
7
i
n
p
u
t
P
0
0
o
u
t
p
u
t
P
0
1
o
u
t
p
u
t
P
0
2
o
u
t
p
u
t
P
0
3
o
u
t
p
u
t
PULL register
Bit 5 =
“
1
”
P
I
n
o
r
t
t
P
0
r
e
p
u
a
d
i
n
g
c
i
r
c
u
i
t
P
“
o
L
r
”
t
l
e
P
v
X
e
x
l
o
u
t
p
u
t
K
e
y
i
n
p
u
t
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
P
I
n
o
r
t
t
P
5
r
e
p
u
a
d
i
n
g
c
i
r
c
u
i
t
Segment output
disable register 1
Bit 3 =
“
1
”
S
d
B
e
i
g
a
2
m
b
e
l
e
=
n
r
“
t
e
1
o
g
”
u
i
s
t
p
t
e
u
r
t
1
s
i
t
Segment output
disable register 1
Bit 1 =
“
1
”
Segment output
disable register 1
Bit 0 =
“
1
”
P-channel transistor for pull-up
CMOS output buffer
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