參數(shù)資料
型號: M38C2XMX
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 13/63頁
文件大?。?/td> 1000K
代理商: M38C2XMX
13
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
I/O PORTS
Direction Registers
The I/O ports P0
P6 have direction registers which determine the
input/output direction of each individual pin. Each bit in a direction
register corresponds to one pin, each pin can be set to be input port
or output port.
When
0
is written to the bit of the direction register, the correspond-
ing pin becomes an input pin. As for ports P0
P2, when
1
is written
to the bit of the direction register and the segment output disable
register, the corresponding pin becomes an output pin. As for ports
P3
P6, when
1
is written to the bit of the direction register, the
corresponding pin becomes an output pin.
If data is read from a pin set to output, the value of the port output
latch is read, not the value of the pin itself. Pins set to input are float-
ing. If a pin set to input is written to, only the port output latch is
written to and the pin remains floating.
Pull-up Control
Each individual bit of ports P0
P2 can be pulled up with a program
by setting direction registers and segment output disable registers 0
to 2 (addresses 0FF8
16
to 0FFA
16
).
The pin is pulled up by setting
0
to the direction register and
1
to
the segment output disable register.
By setting the PULL register (address 0FF1
16
), ports P3
P6 can con-
trol pull-up with a program.
However, the contents of PULL register do not affect ports pro-
grammed as the output ports.
Fig. 11 Structure of PULL register and segment output disable register
Fig. 10 Structure of ports P0 to P2
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P3
0
P3
3
pull-up
P3
4
P3
7
pull-up
P4
0
P4
3
pull-up
P4
4
P4
7
pull-up
P5
0
P5
3
pull-up
P5
4
P5
7
pull-up
P6
0
P6
2
pull-up
Not used (return
0
when read)
PULL register
(PULL : address 0FF1
16
)
b7
b0
P0
0
pull-up
P0
1
pull-up
P0
2
pull-up
P0
3
pull-up
P0
4
pull-up
P0
5
pull-up
P0
6
pull-up
P0
7
pull-up
Segment output disable register 0
(SEG0 : address 0FF8
16
)
b7
b0
Note:
The PULL register and segment output disable register
affect only ports programmed as the input ports.
0: No pull-up
1: Pull-up
P1
0
pull-up
P1
1
pull-up
P1
2
pull-up
P1
3
pull-up
P1
4
pull-up
P1
5
pull-up
P1
6
pull-up
P1
7
pull-up
b7
b0
Segment output disable register 1
(SEG1 : address 0FF9
16
)
P2
0
pull-up
P2
1
pull-up
P2
2
pull-up
P2
3
pull-up
P2
4
pull-up
P2
5
pull-up
P2
6
pull-up
P2
7
pull-up
b7
b0
Segment output disable register 2
(SEG2 : address 0FFA
16
)
0: No pull-up
1: Pull-up
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