參數(shù)資料
型號(hào)： M38869MFAHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 90/111頁(yè)
文件大小： 1644K
代理商： M38869MFAHP
8
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
for flash
memory
version
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
CPU mode register
(CPUM : address 003B16)
b7
b0
Stack page selection bit
0 : 0 page
1 : 1 page
Reserved
(Do not write “0” to this bit when using
XCIN–XCOUT oscillation function.)
Processor mode bits
b1 b0
0
0 : Single-chip mode
0
1 : Memory expansion mode
1
0 : Microprocessor mode ( Note)
1
1 : Not available
Port XC switch bit
0 : I/O port function (stop oscillating)
1 : XCIN–XCOUT oscillating function
Main clock (X IN–XOUT) stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bits
b7 b6
0
0 :
φ = f(XIN)/2 (high-speed mode)
0
1 :
φ = f(XIN)/8 (middle-speed mode)
1
0 :
φ = f(XCIN)/2 (low-speed mode)
1
1 : Not available
Note: This mode is not available for the flash memory version.
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 3886 group uses the standard 740 Family instruction set. Re-
fer to the table of 740 Family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit, the
processor mode bits specifying the chip operation mode, etc.
The CPU mode register is allocated at address 003B16.
Fig. 6 Structure of CPU mode register
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