參數(shù)資料
型號(hào)： M38869MFAHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 67/111頁(yè)
文件大小： 1644K
代理商： M38869MFAHP
59
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
for flash
memory
version
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 60 State transitions of system clock
CM4 : Port Xc switch bit
0 : I/O port function (stop oscillating)
1 : XCIN-XCOUT oscillating function
CM5 : Main clock (XIN- XOUT) stop bit
0 : Operating
1 : Stopped
CM7, CM6: Main clock division ratio selection bit
b7 b6
0
0 :
φ = f(XIN)/2 ( High-speed mode)
0
1 :
φ = f(XIN)/8 (Middle-speed mode)
1
0 :
φ = f(XCIN)/2 (Low-speed mode)
1
1 : Not available
Notes
Reset
CM
4
“1”
←→
“0”
CM
4
“0”
←→
“1”
CM
6
“1”
←→
“0”
CM
4
“1”
←→
“0”
CM
6
“1”
←→
“0”
CM
7
“1”
←→
“0”
CM
4
“1”
←→
“0”
CM
5
“1”
←→
“0”
CM6
“1”
←→“0”
CM6
“1”
←→“0”
CPU mode register
b7
b4
CM
7
“0”
←→
“1”
CM
6
“1”
←→
“0”
(CPUM : address 003B 16)
CM7=0
CM6=1
CM5=0(8 MHz oscillating)
CM4=0(32 kHz stopped)
Middle-speed mode
(f(
φ)=1 MHz)
CM7=0
CM6=1
CM5=0(8 MHz oscillating)
CM4=1(32 kHz oscillating)
Middle-speed mode
(f(
φ)=1 MHz)
CM7=0
CM6=0
CM5=0(8 MHz oscillating)
CM4=0(32 kHz stopped)
High-speed mode
(f(
φ)=4 MHz)
CM7=1
CM6=0
CM5=0(8 MHz oscillating)
CM4=1(32 kHz oscillating)
Low-speed mode
(f(
φ)=16 kHz)
CM7=1
CM6=0
CM5=1(8 MHz stopped)
CM4=1(32 kHz oscillating)
Low-speed mode
(f(
φ)=16 kHz)
CM7=0
CM6=0
CM5=0(8 MHz oscillating)
CM4=1(32 kHz oscillating)
High-speed mode
(f(
φ)=4 MHz)
1 : Switch the mode by the allows shown between the mode blocks. (Do not switch between the modes directly without an allow.)
2 : The all modes can be switched to the stop mode or the wait mode and return to the source mode when the stop mode or the wait mode is
ended.
3 : Timer operates in the wait mode.
4 : When the stop mode is ended, a delay of approximately 1 ms occurs by connecting prescaler 12 and Timer 1 in middle/high-speed mode.
5 : When the stop mode is ended, a delay of approximately 0.25 s occurs by Timer 1 and Timer 2 in low-speed mode.
6 : Wait until oscillation stabilizes after oscillating the main clock X IN before the switching from the low-speed mode to middle/high-speed
mode.
7 : The example assumes that 8 MHz is being applied to the X IN pin and 32 kHz to the X CIN pin.
φ indicates the internal clock.
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