參數(shù)資料
型號(hào)： M38869MFAHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù)： 85/111頁
文件大?。?/td> 1644K
代理商： M38869MFAHP
75
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
for flash
memory
version
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Functional Outline (serial I/O mode)
In the serial I/O mode, data is transferred synchronously with the
clock using serial input/output. The input data is read from the
SDA pin into the internal circuit synchronously with the rising edge
of the serial clock pulse; the output data is output from the SDA
pin synchronously with the falling edge of the serial clock pulse.
Data is transferred in units of eight bits.
In the first transfer, the user inputs the command code. This is fol-
lowed by address input and data input/output according to the
contents of the command. Table 26 shows the software com-
mands used in the serial I/O mode. The following explains each
software command.
Table 26 Software command (serial I/O mode)
Read
Program
Program verify
Erase
Erase verify
Error check
Number of transfers
Command
First command
code input
0016
4016
C016
2016
A016
8016
Read address L (Input)
Program address L (Input)
Verify data (Output)
2016 (Input)
Verify address L (Input)
Error code (Output)
Second
Read address H (Input)
Program address H (Input)
—————
Verify address H (Input)
—————
Third
Fourth
Read data (Output)
Program data (Input)
—————
Verify data (Output)
—————
q Read command
Input command code 0016 in the first transfer. Proceed and input
the low-order 8 bits and the high-order 8 bits of the address and
__
pull the OE pin low. When this is done, the M38869FFAHP reads
out the contents of the specified address, and then latchs it into
__
the internal data latch. When the OE pin is released back high and
serial clock is input to the SCLK pin, the read data that has been
latched into the data latch is serially output from the SDA pin.
Fig. 72 Timings during reading
“L”
SCLK
BUSY
OE
SDA
tCH
A0
A7
A8
A15
D0
D7
tCH
tCR
Command code input (0016)
Read address input (L)
Read address input (H)
Read data output
tWR
Read
tRC
Note : When outputting the read data, the SDA pin is switched for output at the first falling edge of SCLK. The SDA pin is placed
in the floating state during the period of th(C-E) after the last rising edge of SCLK (at the 8th bit).
00000000
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M38869MFA-XXXGP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
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