M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
Rev.1.01 2003.07.16 page 124 of 170
Power source current
HIGH output voltage P5
2
–P5
5
, P1
0
, P0
3
, P1
5
–P1
7
,
P2
0
–P2
7
, P3
0
, P3
1
LOW output voltage
S
OUT
, S
CLK
, P0
0
–P0
7
, P1
0
,
P1
5
–P1
7
, P2
0
–P2
7
,P3
2
,
P4
7
, P5
0
–P5
7
, P6
0
–P6
2
, P6
5
–P6
7
LOW output voltage
P3
0
, P3
1
LOW output voltage
P1
1
–P1
4
Hysteresis (See note 6)
RESET, H
SYNC
, V
SYNC
, INT1,INT2,
INT3, TIM2, TIM3, S
IN
, S
CLK
, SCL1,
SCL2, SDA1, SDA2
HIGH input leak current
RESET, P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–
P2
7
, P3
0
, P3
1
, P4
0
–P4
6
, P6
3
, P6
4
,
P7
0
–P7
2
, H
SYNC
, V
SYNC
LOW input leak current
RESET, P0
0
–P0
7
, P1
0
–P1
7
,
P2
0-
P2
7
, P3
0
, P3
1
, P4
0
–P4
6
, P6
3
,
P6
4
, P7
0
–P7
2
, H
SYNC
, V
SYNC
I
2
C-BUS·BUS switch connection resistor
(between SCL1 and SCL2, SDA1 and SDA2)
Max.
30
50
70
200
4
100
10
0.4
3.0
0.4
0.6
1.3
5
5
130
Limits
Typ.
15
Min.
2.4
12. ELECTRIC CHARACTERISTICS
(V
CC
= 5 V ± 10 %, V
SS
= 0 V, f(X
IN
) = 8 MHz, T
a
= –10 °C to 70 °C, unless otherwise noted)
I
CC
V
OH
V
OL
V
T+
– V
T–
I
IZH
I
ZL
R
BS
30
50
60
2
25
1
0.5
Symbol
Parameter
Test conditions
Unit
System operation
Wait mode
Stop mode
V
CC
= 5.5 V, f(X
IN
) = 0,
f(X
CIN
) = 32 kHz,
OSD OFF, Data slicer OFF,
Low-power dissipation mode set
(CM5 = “0”, CM6 = “1”)
V
CC
= 5.5 V, f(X
IN
) = 8 MHz
V
CC
= 5.5 V, f(X
IN
) = 0,
f(X
CIN
) = 32kHz,
Low-power dissipation mode set
(CM5 = “0”, CM6 = “1”)
V
CC
= 5.5 V, f(X
IN
) = 0
f(X
CIN
) = 0
V
CC
= 4.5 V
I
OH
= –0.5 mA
V
CC
= 4.5 V
I
OL
= 0.5 mA
V
CC
= 4.5 V
I
OL
= 10.0 mA
V
CC
= 4.5 V
V
CC
= 5.0 V
V
CC
= 5.5 V
V
I
= 5.5 V
V
CC
= 5.5 V
V
I
= 0 V
V
CC
= 4.5 V
CRT OFF
Data slicer OFF
CRT ON (digital output)
Data slicer ON
CRT ON (analog output)
Data slicer ON
Test
circuit
V
CC
= 5.5 V,
f(X
IN
) = 8 MHz
mA
μ
A
mA
μ
A
V
V
V
V
μ
A
mA
1
2
2
3
4
5
Notes 1:
The total current that flows out of the IC must be 20 or less.
2:
The total input current to IC (I
OL1
+ I
OL2
+ I
OL3
) must be 20 mA or less.
3:
The total average input current for ports P3
0
, P3
1
to IC must be 10 mA or less.
4:
Connect 0.1
μ
F or more capacitor externally between the power source pins V
CC
–V
SS
(and AV
CC
–V
SS
) so as to reduce power source noise.
Also connect 0.1
μ
F or more capacitor externally between the pins V
CC
–CNV
SS
. ( ) ...M37280EKSP
5:
Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit. When using the data slicer, use 8 MHz.
6:
P1
6
, P4
1
–P4
4
have the hysteresis when these pins are used as interrupt input pins or timer input pins. P1
1
–P1
4
have the hysteresis when these pins are
used as multi-master I
2
C-BUS interface ports. P1
7
, P4
6
and P7
2
have the hysteresis when these pins are used as serial I/O pins.
7:
When using the sub-clock, set f
CLK
< f
CPU
/3.
8:
Pin names in each parameter is described as below.
(1) Dedicated pins: dedicated pin names.
(2) Duble-/triple-function ports
When the same limits: I/O port name.
When the limits of functins except ports are different from I/O port limits: function pin name.
I
OL
= 3 mA
I
OL
= 6 mA