參數(shù)資料
型號(hào): M37281MKH-XXXSP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 121/172頁
文件大小: 1319K
代理商: M37281MKH-XXXSP
Rev.1.01 2003.07.16 page 121 of 170
M37281MAH
XXXSP,M37281MFH
XXXSP,M37281MKH
XXXSP, M37281EKSP
Fig.8.14.4 State Transitions of System Clock
Reset
The example assumes that 8 MHz is being applied to the X
IN
pin and 32 kHz to the X
CIN
pin. The
φ
indicates the internal clock.
WIT instruction
CM7 : Internal system clock selection bit
0 : X
IN
-X
OUT
selected (high-speed mode)
1 : X
CIN
-X
COUT
selected (low-speed mode)
CPU mode register
(Address : 00FB
16
)
CM6 : Main clock (X
IN
X
OUT
) stop bit
0 : Oscillating
1 : Stopped
8 MHz oscillating
32 kHz oscillating
φ
is stopped (HIGH)
Timer operating
8 MHz oscillating
32 kHz oscillating
f(
φ
) = 4 MHz
8 MHz stopped
32 kHz stopped
φ
is stopped (HIGH)
8 MHz oscillating
32 kHz oscillating
φ
is stopped (HIGH)
Timer operating
(Note 3)
8 MHz oscillating
32 kHz oscillating
f(
φ
) = 16 kHz
8 MHz stopped
32 kHz stopped
φ
is stopped (HIGH)
8 MHz stopped
32 kHz stopped
φ
= stopped (HIGH )
8 MHz stopped
32 kHz oscillating
f(
φ
) = 16 kHz
8 MHz stopped
32 kHz oscillating
φ
is stopped (HIGH)
Timer operating
(Note 3)
Interrupt
STP instruction
Interrupt (Note 1)
WIT instruction
Interrupt
WIT instruction
Interrupt
STP instruction
Interrupt (Note 2)
STP instruction
Interrupt (Note 2)
CM7 = 1
CM7 = 0
CM6 = 1
CM6 = 0
External INT,
timer interrupt,
or SI/O interrupt
External INT
Notes 1:
When the STP state is ended, a delay of approximately 4 ms is automatically generated by timer 3 and timer 4.
2:
The delay after the STP state ends is approximately 1 s.
3:
When the internal clock
φ
divided by 8 is used as the timer count source, the frequency of the count source is 2 kHz.
The program must
allow time for 8 MHz
oscillation to stabilize
High-speed operation start
mode
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