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參數(shù)資料
| 型號： | M34552M8H-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 8/143頁 |
| 文件大?。?/td> | 0K |
| 代理商： | M34552M8H-XXXFP |
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8: REGISTERS
S1D13505F00A HARDWARE FUNCTIONAL
EPSON
1-93
SPECIFICATION (X23A-A-001-12)
Pins MA9, MA10, MA11 are multi-functional – they can be DRAM address outputs or
general purpose IO dependent on the DRAM type. MD[7:6] are used to identify the
DRAM type and congure these pins as follows:
These bits are used to control the direction of these pins when they are used as general
purpose IO. These bits have no effect when the pins are used as DRAM address outputs.
bit 3
GPIO3 Pin IO Conguration
When this bit = 1, the GPIO3 pin is congured as an output pin.
When this bit = 0 (default), the GPIO3 pin is congured as an input pin.
bit 2
GPIO2 Pin IO Conguration
When this bit = 1, the GPIO2 pin is congured as an output pin.
When this bit = 0 (default), the GPIO2 pin is congured as an input pin.
bit 1
GPIO1 Pin IO Conguration
When this bit = 1, the GPIO1 pin is congured as an output pin.
When this bit = 0 (default), the GPIO1 pin is congured as an input pin.
This register position is reserved for future use.
bit 3
GPIO3 Pin IO Status
When GPIO3 is congured as an output (see REG[1Eh]), a “1” in this bit drives GPIO3
high and a “0” in this bit drives GPIO3 low.
When GPIO3 is congured as an input, a read from this bit returns the status of GPIO3.
bit 2
GPIO2 Pin IO Status
When GPIO2 is congured as an output (see REG[1Eh]), a “1” in this bit drives GPIO2
high and a “0” in this bit drives GPIO2 low.
When GPIO2 is congured as an input, a read from this bit returns the status of GPIO2.
bit 1
GPIO1 Pin IO Status
When GPIO1 is congured as an output (see REG[1Eh]), a “1” in this bit drives GPIO1
high and a “0” in this bit drives GPIO1 low.
When GPIO1 is congured as an input, a read from this bit returns the status of GPIO1.
General IO Pins Configuration Register 0
REG[1Eh]
RO
n/a
GPIO3 Pin
IO Cong.
GPIO2 Pin
IO Cong.
GPIO1 Pin
IO Cong.
n/a
Table 8-11 MA/GPIO Pin Functionality
MD[7:6] at Rising
Edge of RESET#
Pin Function
MA9
MA10
MA11
00
GPIO3
GPIO1
GPIO2
01
MA9
GPIO1
GPIO2
10
MA9
GPIO1
GPIO2
11
MA9
MA10
MA11
General IO Pins Configuration Register 1
REG[1Fh]
RW
n/a
General IO Pins Control Register 0
REG[20h]
RW
n/a
GPIO3 Pin
IO Status
GPIO2 Pin
IO Status
GPIO1 Pin
IO Status
n/a
相關PDF資料 |
PDF描述 |
|---|---|
| M34552G8HFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| M34556G8HFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34556M8-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34556M8H-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34556M4H-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M34552M8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552MXH-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552MX-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34553G8FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34553G8HFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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