參數(shù)資料
型號(hào): M34552M8H-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 103/143頁
文件大?。?/td> 0K
代理商: M34552M8H-XXXFP
7: A.C. CHARACTERISTICS
1-50
EPSON
S1D13505F00A HARDWARE FUNCTIONAL
SPECIFICATION (X23A-A-001-12)
EDO-DRAM Self-Refresh Timing
Figure 7-17 EDO-DRAM Self-Refresh Timing
Table 7-17 EDO-DRAM Self-Refresh Timing
Symbol
Parameter
Min.
Max.
Units
t1
Internal memory clock period
25
ns
t2
RAS# precharge time (REG[22h] bits 3-2 = 00)
2 t1 - 3
ns
RAS# precharge time (REG[22h] bits 3-2 = 01)
1.45 t1 - 3
ns
RAS# precharge time (REG[22h] bits 3-2 = 10)
1 t1 - 3
ns
t3
RAS# to CAS# precharge time (REG[22h] bits 3-2 = 00)
1.45 t1 - 3
ns
RAS# to CAS# precharge time (REG[22h] bits 3-2 = 01 or 10)
0.45 t1 - 3
ns
t4
CAS# setup time (REG[22h] bits 3-2 = 00 or 10)
0.45 t1 - 3
ns
CAS# setup time (REG[22h] bits 3-2 = 01)
1 t1 - 3
ns
t5
CAS# precharge time (REG[22h] bits 3-2 = 00)
2 t1 - 3
ns
CAS# precharge time (REG[22h] bits 3-2 = 01 or 10)
1 t1 - 3
ns
RAS#
CAS#
t5
t3
t4
t2
Memory
Clock
Stopped for
suspend mode
Restarted for
active mode
t1
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