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參數(shù)資料
| 型號： | M30L0R7000T0ZAQE |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | AB 35C 7#12,28#16 PIN RECP |
| 中文描述： | 128兆位（8兆x16插槽，多銀行，多層次，多突發(fā)），1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 67/83頁 |
| 文件大?。?/td> | 1329K |
| 代理商： | M30L0R7000T0ZAQE |
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M30L0R7000T0, M30L0R7000B0
Note: 1. The variable P is a pointer which is defined at CFI offset 15h.
2. Bank Regions. There are two Bank Regions, There are two Bank Regions, see
Table 29.
and
Table 30.
Table 40. Bank and Erase Block Region 2 Information
(P+32)h = 13Ch
06h
Bank Region 1 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
(P+33)h = 13Dh
00h
(P+34)h = 13Eh
00h
(P+35)h = 13Fh
02h
(P+36)h = 140h
64h
Bank Region 1 (Erase Block Type 2)
Minimum block erase cycles × 1000
(P+37)h = 141h
00h
(P+38)h = 142h
02h
Bank Regions 1 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+39)h = 143h
03h
Bank Region 1 (Erase Block Type 2): Page mode and
Synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data
(P+32)h = 13Ch
01h
(P+3A)h = 144h
0Fh
Number of identical banks within Bank Region 2
(P+33)h = 13Dh
00h
(P+3B)h = 145h
00h
(P+34)h = 13Eh
11h
(P+3C)h = 146h
11h
Number of program or erase operations allowed in Bank
Region 2:
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+35)h = 13Fh
00h
(P+3D)h = 147h
00h
Number of program or erase operations allowed in other
banks while a bank in this region is programming
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+36)h = 140h
00h
(P+3E)h = 148h
00h
Number of program or erase operations allowed in other
banks while a bank in this region is erasing
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+37)h = 141h
02h
(P+3F)h = 149h
01h
Types of erase block regions in Bank Region 2
n = number of erase block regions with contiguous same-size
erase blocks.
Symmetrically blocked banks have one blocking region.
(2)
(P+38)h = 142h
06h
(P+40)h = 14Ah
77h
Bank Region 2 Erase Block Type 1 Information
Bits 0-15: n+1 = number of identical-sized erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
(P+39)h = 143h
00h
(P+41)h = 14Bh
00h
(P+3A)h = 144h
00h
(P+42)h = 14Ch
00h
(P+3B)h = 145h
02h
(P+43)h = 14Dh
02h
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data
相關(guān)PDF資料 |
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| M30L0R7000T0ZAQF | CAP 0.1UF 50V 10% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000T0ZAQT | CAP 0.22UF 50V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000B0ZAQT | CAP 0.047UF 100V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R8000T0ZAQ | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQF | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R7000T0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000XX | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R8000B0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQ | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
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