- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359054 > M30L0R7000T0ZAQE (意法半導(dǎo)體) AB 35C 7#12,28#16 PIN RECP PDF資料下載
參數(shù)資料
| 型號： | M30L0R7000T0ZAQE |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | AB 35C 7#12,28#16 PIN RECP |
| 中文描述： | 128兆位（8兆x16插槽，多銀行，多層次，多突發(fā)），1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 31/83頁 |
| 文件大?。?/td> | 1329K |
| 代理商： | M30L0R7000T0ZAQE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
31/83
M30L0R7000T0, M30L0R7000B0
quence can be suspended and resumed as often
as required as long as the operating conditions of
the device are met.
A Synchronous Burst Read operation is suspend-
ed when Chip Enable, E, is Low and the current
address has been latched (on a Latch Enable ris-
ing edge or on a valid clock edge). The Clock sig-
nal is then halted at V
IH
or at V
IL
, and Output
Enable, G, goes High.
When Output Enable, G, becomes Low again and
the Clock signal restarts, the Synchronous Burst
Read operation is resumed exactly where it
stopped.
WAIT will revert to high-impedance when Output
Enable, G, or Chip Enable, E, goes High.
See
Table 22., Synchronous Read AC Character-
istics
, and
Figure 14., Synchronous Burst Read
Suspend AC Waveforms
, for details.
Single Synchronous Read Mode
Single Synchronous Read operations are similar
to Synchronous Burst Read operations except that
the memory outputs the same data to the end of
the operation.
Synchronous Single Reads are used to read the
Electronic Signature, Status Register, CFI, Block
Protection Status, Configuration Register Status
or Protection Register. When the addressed bank
is in Read CFI, Read Status Register or Read
Electronic Signature mode, the WAIT signal is as-
serted during the X latency, the Wait state and at
the end of a 4, 8 and 16 Word burst. It is only de-
asserted when output data are valid.
See
Table 22., Synchronous Read AC Character-
istics
, and
Figure 12., Synchronous Burst Read
AC Waveforms
, for details.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30L0R7000T0ZAQF | CAP 0.1UF 50V 10% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000T0ZAQT | CAP 0.22UF 50V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R7000B0ZAQT | CAP 0.047UF 100V 20% X7R DIP-2 BULK R-MIL-C-39014 |
| M30L0R8000T0ZAQ | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQF | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R7000T0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000T0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R7000XX | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst), 1.8V Supply Flash Memory |
| M30L0R8000B0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQ | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。