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參數(shù)資料
| 型號(hào)： | LXT384BE |
| 元件分類： | 通信、網(wǎng)絡(luò)模塊及開發(fā)工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 電信/數(shù)據(jù)通信 |
| 文件頁數(shù)： | 17/80頁 |
| 文件大?。?/td> | 1112K |
| 代理商： | LXT384BE |
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Octal T1/E1/J1 Transceiver
—
LXT384
Datasheet
17
43
K2
MUX
DI
Multiplexed/Non-Multiplexed Select Input.
When Low the parallel host interface operates in non-multiplexed mode.
When High the parallel host interface operates in multiplexed mode. In
hardware mode, tie this unused input low.
44
N4, P4
TVCC0
S
Transmit Driver Power Supply.
Power supply pin for the output driver.
TVCC pins can be connected to either a 3.3V or 5V power supply.
Please refer to the Transmitter description.
45
46
N5
P5
TTIP0
TRING0
AO
AO
Transmit Tip Output.
Transmit Ring Output.
These pins are differential line driver outputs. TTIP and TRING will be in
high impedance state if the TCLK pin is Low or the OE pin is Low. In
software mode, TTIP and TRING can be tristated on a port-by-port
basis by writing a
‘
1
’
to the OEx bit in the Output Enable Register
(OER).
47
N6, P6
TGND0
S
Transmit Driver Ground.
Ground pin for the output driver.
48
49
P7
N7
RTIP0
RRING0
AI
AI
Receive TIP Input.
Receive Ring Input.
These pins are the inputs to the differential line receiver. Data and clock
are recovered and output on the RPOS/RNEG and RCLK pins.
50
L6, M6
TGND1
S
Transmit Driver Ground.
51
52
M5
L5
TRING1
TTIP1
AO
AO
Transmit Ring Output.
Transmit Tip Output.
53
L4, M4
TVCC1
S
Transmit Driver Power Supply.
54
55
L7
M7
RRING1
RTIP1
AI
AI
Receive Ring Input.
Receive Tip Input.
56
L11,
M11
TVCC2
S
Transmit Driver Power Supply.
57
58
L10
M10
TTIP2
TRING2
AO
AO
Transmit Tip Output.
Transmit Ring Output.
59
L9, M9
TGND2
S
Transmit Driver Ground.
60
61
M8
L8
RTIP2
RRING2
AI
AI
Receive TIP Input.
Receive Ring Input.
62
N9, P9
TGND3
S
Transmit Driver Ground.
63
64
P10
N10
TRING3
TTIP3
AO
AO
Transmit Ring.
Transmit Tip Output.
65
N11,
P11
TVCC3
S
Transmit Driver Power Supply.
66
67
N8
P8
RRING3
RTIP3
AI
AI
Receive Ring Input.
Receive Tip Input.
68
K11
LOS3
DO
Loss of Signal Output.
Table 1. LXT384 Pin Description (Sheet 7 of 12)
Pin #
QFP
Ball #
PBGA
Symbol
I/O
1
Description
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output
S: Power Supply; N.C.: Not Connected.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT384LE | Telecomm/Datacomm |
| LXT386BE | PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC |
| LXT386LE | PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| LXT388LE | PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| LXT400JE | Hermetically Sealed, 3.3V, High Speed, High CMR, Logic Gate Optocoupler |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT384LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| LXT386 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:QUAD T1/E1/J1 Transceiver |
| LXT386BE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC |
| LXT386LE | 制造商:LEVEL1 功能描述: |
| LXT388LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
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