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| 型號(hào)： | LAN8187-JT |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-64 |
| 文件頁(yè)數(shù)： | 27/66頁(yè) |
| 文件大?。?/td> | 545K |
| 代理商： | LAN8187-JT |
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High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
SMSC LAN8187/LAN8187I
27
Revision 0.6 (02-24-06)
DATASHEET
Most of the MII and RMII pins are multiplexed.
Table 4.2, "MII/RMII Signal Mapping"
, shown below,
describes the relationship of the related device pins to what pins are used in MII and RMII mode.
Note 4.1
In RMII mode, this pin needs to tied to VSS.
Note 4.2
The RX_ER signal is optional on the RMII bus. This signal is required by the PHY, but it
is optional for the MAC. The MAC can choose to ignore or not use this signal.
4.7
Auto-negotiation
The purpose of the Auto-negotiation function is to automatically configure the PHY to the optimum link
parameters based on the capabilities of its link partner. Auto-negotiation is a mechanism for
exchanging configuration information between two link-partners and automatically selecting the highest
performance mode of operation supported by both sides. Auto-negotiation is fully defined in clause 28
of the IEEE 802.3 specification.
Once auto-negotiation has completed, information about the resolved link can be passed back to the
controller via the Serial Management Interface (SMI). The results of the negotiation process are
reflected in the Speed Indication bits in register 31, as well as the Link Partner Ability Register
(Register 5).
The auto-negotiation protocol is a purely physical layer activity and proceeds independently of the MAC
controller.
Table 4.2 MII/RMII Signal Mapping
SIGNAL NAME
MII MODE
RMII MODE
TXD0
TXD0
TXD0
TXD1
TXD1
TXD1
TX_EN
TX_EN
TX_EN
RX_ER/
RXD4
RX_ER/
RXD4/
RX_ER
Note 4.2
COL/CRS_DV
COL
CRS_DV
RXD0
RXD0
RXD0
RXD1
RXD1
RXD1
TXD2
TXD2
Note 4.1
TXD3
TXD3
Note 4.1
TX_ER/
TXD4
TX_ER/
TXD4
CRS
CRS
RX_DV
RX_DV
RXD2
RXD2
RXD3
RXD3
TX_CLK
TX_CLK
RX_CLK
RX_CLK
CLKIN/XTAL1
CLKIN/XTAL1
REF_CLK
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