- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359605 > LAN8187-JT (STANDARD MICROSYSTEMS CORP) High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX PDF資料下載
參數(shù)資料
| 型號(hào)： | LAN8187-JT |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, TQFP-64 |
| 文件頁數(shù)： | 13/66頁 |
| 文件大?。?/td> | 545K |
| 代理商： | LAN8187-JT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
SMSC LAN8187/LAN8187I
13
Revision 0.6 (02-24-06)
DATASHEET
RXD0
O
Receive Data 0
: Bit 0 of the 4 data bits that are sent by the PHY
in the receive path.
RXD1
O
Receive Data 1
: Bit 1 of the 4 data bits that are sent by the PHY
in the receive path.
RXD2
O
Receive Data 2
: Bit 2 of the 4 data bits that sent by the PHY in
the receive path.
Note:
This signal is not used in RMII Mode.
RXD3/
nINTSEL
O
Receive Data 3
: Bit 3 of the 4 data bits that sent by the PHY in
the receive path.
nINTSEL
: On power-up or external reset, the mode of the
nINT/TXER/TXD4 pin is selected.
When floated or pulled to VDDIO, nINT is selected (default).
When pulled low to VSS through a Pull-down resistor (see
Table 4.3, “Boot Strapping Configuration Resistors,” on
page 32
), TXER/TXD4 is selected.
Notes:
RXD3 is not used in RMII Mode
If the nINT/TXER/TXD4 pin is configured for nINT mode, it
needs a pull-up resistor to VDDIO.
See
Section 4.10, "(TX_ER/TXD4)/nINT Strapping," on
page 30
for additional information on configuration/strapping
options.
RX_ER/
RXD4
I/O
Receive Error
: Asserted to indicate that an error was detected
somewhere in the frame presently being transferred from the
PHY.
MII Receive Data 4
: In Symbol Interface (5B Decoding) mode,
this signal is the MII Receive Data 4 signal, the MSB of the
received 5-bit symbol code-group.
Notes:
The RX_ER signal is optional in RMII Mode.
RX_CLK
O
Receive Clock
: 25MHz in 100Base-TX mode. 2.5MHz in
10Base-T mode.
Notes:
This signal is not used in RMII Mode
COL/CRS_DV
O
MII Collision Detect
: Asserted to indicate detection of collision
condition.
RMII CRS_DV (Carrier Sense/Receive Data Valid)
Asserted to
indicate when the receive medium is non-idle. When a 10BT
packet is received, CRS_DV is asserted, but RXD[1:0] is held
low until the SFD byte (10101011) is received. In 10BT, half-
duplex mode, transmitted data is not looped back onto the
receive data pins, per the RMII standard.
Note:
See
Section 4.6.3, "MII vs. RMII Configuration," on
page 26
for more details.
Table 3.1 MII Signals (continued)
SIGNAL NAME
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC47S42X | ENHANCED SUPER I/O WITH LPC INTERFACE FOR SERVER APPLICATIONS |
| LPC47M141-NC | 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M142-NC | 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M144-NC | 128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB |
| LPC47M145-NC | e2 Rechargeable Nickel Metal Hydride Battery; Voltage Rating:1.2V; Battery Size Code:AA; Battery Capacity:2500mAh; Battery Terminals:Pressure Contact; Diameter:14.5mm; Height:50.5mm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LAN83C171 | 制造商:SMSC 制造商全稱:SMSC 功能描述:EPIC/XF ACPI/PC 97 Compliant Integrated PCI 10/100 Mbps Fast Ethernet Controller |
| LAN83C171 WAF | 制造商:SMSC 功能描述: |
| LAN83C171QFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMSC 功能描述: |
| LAN83C175 | 制造商:SMSC 制造商全稱:SMSC 功能描述:Ethernet CARDBUS Integrated Controller With Modem Support |
| LAN83C175TQFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:SMC Corporation of America 功能描述:83C175TQFP 制造商:SMSC 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。