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參數(shù)資料
| 型號： | L6238 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Sensorless Spindle Motor Driver(無傳感器主軸電機驅(qū)動器) |
| 中文描述： | 傳感器主軸電機驅(qū)動器（無傳感器主軸電機驅(qū)動器） |
| 文件頁數(shù)： | 7/35頁 |
| 文件大?。?/td> | 383K |
| 代理商： | L6238 |
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1.2 Input Default States
Figure2
: InputStructures
Figure 2 depicts the two possible input structures
for the logic inputs. If a particular pin is not used
in an application, it may either be connected to
ground or VLOGIC as required, or simply left un-
connected. If no connection is made, the pin is
either pulled high or low by internal constant cur-
rent generatorsas shown
A listing of the logic inputs is shown with the cor-
respondingdefault state.
1.3 Naming Convention
In order to differentiatebetween the various types
of control and status signals, the followingnaming
conventionis used.
BOLDCAPITALS
- Devicepins.
Italics - Serial port controland status signals.
Three input signals form a special case. Referring
to figure 3, the RUN/BRAKE input pin and the
Run/Brakecontrol signal form a logical AND func-
tion, while OUTPUT ENABLE and Output Enable
form an OR function. The outputs signal names,
in
Bold Lower
case labeled
Run/Brake and Out-
put Enable
will be used when referring to these
signals. Although not shown, SEQUENCE IN-
CREMENT and Sequence Increment also form
an OR function, with the resultant output signal
called
SequenceIncrement.
1.4 Modes of Operation
There are 5 basic modes of operation.
1)
Tristate
When Output Enable is low, the output power
drivers are tristated.
2)
Start-Up
With Output Enable high, bringing
Run/Brake
from a low to a high will energize the motor and
the system will be driven by the Fully-Integrated
StartUp Algorithm. A user-defined Start-Up Algo-
rithm, under control of a MicroProcessor, can be
achieved via a serial port and/or external control
pins.
3)
Run
Identified by the Lock signal, Run mode is
achievedwhen the motor speed (controlled by the
Internal PLL) reaches the nominal speed within a
predefinedphaseerror.
4)
Park
When Run/Brake is brought low, energy to park
the heads may be derived from the rectified Bemf.
The energy recovery time is a function of the
Brake Delay Time Constant. In this state, the qui-
escent current of the device is minimized (sleep
mode).
5)
Brake
After the Energy Recovery Time-Out, the device
is in Brake, with all lower Drivers in full conduc-
tion.
During a powerdown, the Park Mode is triggered,
followedby a DynamicBrake.
There are two mutually exclusive conditions
which may be present during the Tristate Mode
(wake up):
FUNCTION
PORT DIS
STROBE
PORT CLK
R/W
DATA I/O
EXT/INT
FREF ENABLE
LIN
OUTPUT ENABLE
RUN/BRAKE
SEQ INCR
SYS CLOCK
EXT INDEX
PLL FREF
CONFIGURATION
PULL-UP
PULL-DOWN
PULL-UP
PULL-UP
PULL-UP
PULL-DOWN
PULL-DOWN
PULL-DOWN
PULL-DOWN
PULL-UP
PULL-DOWN
PULL-UP
PULL-UP
PULL-UP
Figure 3:
Input Logic
L6238
7/35
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