
ELECTRICALCHARACTERISTICS
(Refer to the test circuit,unless otherwise specified.)
Symbol
POWER SECTION
V
Power
R
DS(on)
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Motor Supply
Output ON Resistance
10.5
12
0.25
13.5
0.33
0.50
1
1.5
V
mA
V
V/
μ
s
T
j
= 25
°
C
T
j
= 125
°
C
I
o(leak)
V
F
dVo/dt
I
m(max)
Output Leakage Current
Body Diode Forward Drop
Output Slew Rate
Motor Current Limit (Note 1)
I
m
= 2.0A
R
slew
= 100K
R
s
= 0.33
I
lim
Gain = 0
I
lim
Gain = 1
I
LIMSET
= 5V
I
lim
Gain = 0
V33 = 0V, V38 = 5V
0.30
TBD
TBD
5
0.75
0.38
TBD
TBD
A/V
A/V
mA
I
gt
Gate Drive for Ext. Power
DMOS
T
sd
T
hys
Shut Down Temperature
Recovery Temperature
Hysteresis
Early Warning Temperature
Current Sense Amp Input Bias
Current
Current Sense Amp Voltage
Gain
Center Tap Input Impedance
150
180
°
C
°
C
30
T
ew
I
snsin
T
sd
-25
°
C
μ
A
10
G
V
3.8
4
4.2
V/V
Z
inCT
30
K
PIN FUNCTIONS
(continued)
N.
23
Name
I/O
I
Function
RUN/BRAKE
Rising edge will initiate start-up. A Braking rountine is started when this input is
brought low.
A low to high transition on this pin increments the Output State Sequencer.
Clock Frequency for the system timer/counters.
External Source of Feedback for the PLL.
Reference Frequency for the PLL.
High when the PLL is phase_locked.
Logic power supply.
Output of Frequency/Phase Detector.
Filter Input.
Filter output and compensation.
Input to the Current Sense Amplifier.
Output C connection for the Motor Current Sense Resistor to ground.
DMOS HalfBridge Output and Input C for Bemf sensing.
A series RC network to ground thatdefines the compensation of the
Transconductance Loop.
Drives the Gate of the External P Channel DMOS Driver for Higher Power
Applications. This pin must be grounded if an external driver is not used.
A voltage applied to this pin, in conjunction with the value for the external
Motor Current Sensing resistor, defines the maximum Motor Current.
Motor Center Tap used for differential BEMF sensing. If the centertap of the
Motor is not brought out, avirtual center tap is integrated and available at this
pin.
A resistorconnected to this pin sets the Voltage Slew Rate of the Output
Drivers.
24
25
26
27
28
30
31
32
33
34
35
36
37
SEQ INCREMENT
SYSTEM CLK
EXT INDEX
PLL Fref
LOCK
Vlogic
DETECTOR OUT
FILTER IN
FILTER COMP
CSA INPUT
Rsense
OUTPUT C
gm COMP
I
I
I
I
O
I
O
I
O
I
O
I/O
I
38
GATE DRIVE
I/O
41
I LIMIT SET
I
43
CENTER TAP
I
44
SLEW RATE
I
L6238
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