參數(shù)資料
型號: KM44S4020CT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2M x 4Bit x 2 Banks Synchronous DRAM(2M x 4位 x 2組同步動態(tài)RAM)
中文描述: 2米x 4位× 2銀行同步DRAM(2米× 4位× 2組同步動態(tài)RAM)的
文件頁數(shù): 43/44頁
文件大?。?/td> 604K
代理商: KM44S4020CT
TIMING DIAGRAM - I
CMOS SDRAM
ELECTRONICS
REV. 4 Nov. '97
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Self Refresh Entry & Exit Cycle
Self Refresh Entry
: Don't care
*Note 1
*Note 7
ó
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Hi-Z
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Hi-Z
ó
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Self Refresh Exit
Auto Refresh
tSS
*Note 2
*Note 3
*Note 4
tRCmin
*Note 6
*Note 5
BA
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
WE
DQM
A
10
/AP
*Note :
TO ENTER SELF REFRESH MODE
1. CS, RAS & CAS with CKE should be low at the same clcok cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don't care except for CKE.
3. The device remains in self refresh mode as long as CKE stays
cf.) Once the device enters self refresh mode, minimum t
"Low".
RAS
is required before exit from self refresh.
TO EXIT SELF REFRESH MODE
4. System colck restart and be stable before returning CKE high.
5. CS starts from high.
6. Minimum t
RC
7. 4K cycle of burst auto refresh is required before self refresh entry and after self refresh exit if the system uses burst ref
resh.
相關(guān)PDF資料
PDF描述
KM44S64230A 16M x 4Bit x 4 Banks Synchronous DRAM(16M x 4位 x 4組同步動態(tài)RAM)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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KM44V4000C 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 4Bit CMOS Dynamic RAM with Fast Page Mode
KM44V4100AT-7 制造商:Samsung Semiconductor 功能描述: