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參數(shù)資料
| 型號(hào)： | K4S161622D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 16Bit x 2 Banks Synchronous DRAM |
| 中文描述： | 為512k × 16 × 2銀行同步DRAM |
| 文件頁數(shù)： | 20/41頁 |
| 文件大小： | 1127K |
| 代理商： | K4S161622D |
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K4S161622D
CMOS SDRAM
12. About Burst Type Control
At MRS A
3
= "0". See the BURST SEQUENCE TABLE. (BL=4,8)
BL=1, 2, 4, 8 and full page.At Full page wrap-around.
At MRS A
3
= "1". See the BURST SEQUENCE TABLE. (BL=4,8)
BL=4, 8. At BL=1, 2 Interleave Counting = Sequential Counting
Every cycle Read/Write Command with random column address can realize
Random Column Access.
That is similar to Extended Data Out (EDO) Operation of conventional DRAM.
Basic
MODE
Random
MODE
Sequential Counting
Interleave Counting
Random column Access
t
CCD
= 1 CLK
13. About Burst Length Control
At MRS A
2,1,0
= "000".
At auto precharge, t
RAS
should not be violated.
At MRS A
2,1,0
= "001".
At auto precharge, t
RAS
should not be violated.
Before the end of burst, Row precharge command of the same bank stops read/write
burst with Row precharge.
t
RDL
= 1 with DQM, valid DQ after burst stop is 1, 2 for CAS latency 2, 3 respectively.
During read/write burst with auto precharge, RAS interrupt can not be issued.
Basic
MODE
Interrupt
MODE
1
2
RAS Interrupt
(Interrupted by Precharge)
At MRS A
2,1,0
= "010".
At MRS A
2,1,0
= "011".
At MRS A
2,1,0
= "111".
Wrap around mode(Infinite burst length)should be stopped by burst stop,
RAS interrupt or CAS interrupt.
4
8
Full Page
At MRS A
9
= "1".
Read burst=1,2,4,8,full page Write burst=1
At auto precharge of write, tRAS should not be violate
t
BDL
= 1, Valid DQ after burst stop is 1, 2 for CAS latency 2, 3 respectively
Using burst stop command, any burst length control is possible.
Before the end of burst, new read/write stops read/write burst and starts new
read/write burst.
During read/write burst with auto precharge, CAS interrupt can not be issued.
BRSW
Burst Stop
CAS Interrupt
Random
MODE
Special
MODE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4S161622E | 1M x 16 SDRAM |
| K4S161622E-TC10 | 1M x 16 SDRAM |
| K4S161622E-TC55 | 1M x 16 SDRAM |
| K4S161622E-TC60 | 1M x 16 SDRAM |
| K4S161622E-TC70 | 1M x 16 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S161622D-TC/L10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM |
| K4S161622D-TC/L55 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM |
| K4S161622D-TC/L60 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM |
| K4S161622D-TC/L70 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM |
| K4S161622D-TC/L80 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16Bit x 2 Banks Synchronous DRAM |
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