參數(shù)資料
型號(hào)： ISP1161ABM
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù)： 68/134頁
文件大?。?/td> 587K
代理商： ISP1161ABM
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
68 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.4.4
Hc
μ
PInterrupt register (R/W: 24H/A4H)
All the bits in this register will be active on power-on reset. However, none of the
active bits will cause an interrupt on the interrupt pin (INT1) unless they are set by the
respective bits in the Hc
μ
PInterruptEnable register, and together with bit 0 of the
HcHardwareConfiguration register.
After this register (24H read) is read, the bits that are active will not be reset, until
logic 1 is written to the bits in this register (A4H - write) to clear it. To clear all the
enabled bits in this register, the HCD must write FFH to this register.
Code (Hex): 24 —
read
Code (Hex): A4 —
write
Table 42:
Bit
Symbol
Reset
Access
Bit
Symbol
Hc
μ
PInterrupt register: bit allocation
15
14
13
12
11
10
9
8
reserved
0
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
HC
R/W
4
R/W
3
R/W
2
AllEOT
Interrupt
0
R/W
R/W
1
ATLInt
R/W
0
reserved
ClkReady
Suspended
0
R/W
OPR_Reg
reserved
SOFITLInt
Reset
Access
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 43:
Bit
15 to 7
6
Hc
μ
PInterrupt register: bit description
Symbol
Description
-
reserved
ClkReady
0 —
no event
1 —
clock is ready. After a wake-up is sent, there is a wait for clock
ready. (Maximum is 1 ms, and typical is 160
μ
s)
0 —
no event
5
HC
Suspended
1 —
the HC has been suspended and no USB activity is sent from
the microprocessor for each ms. When the microprocessor wants
to suspend the HC, the microprocessor must write to the
HcControl register. And when all downstream devices are
suspended, then the HC stops sending SOF; the HC is suspended
by having the HcControl register written into.
0 —
no event
4
OPR_Reg
1 —
there are interrupts from HC side. Need to read HcControl
and HcInterrupt registers to detect type of interrupt on the HC (if
the HC requires the Operational register to be updated)
reserved
0 —
no event
3
2
-
AllEOT
Interrupt
1 —
implies that data transfer has been completed via PIO transfer
or DMA transfer. Occurrence of internal or external EOT will set
this bit.
相關(guān)PDF資料
PDF描述
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
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ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
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參數(shù)描述
ISP1161ABM,518 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM,551 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM,557 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABM-S 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161ABM-T 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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