參數資料
型號: ISP1161ABM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數: 25/134頁
文件大?。?/td> 587K
代理商: ISP1161ABM
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
25 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The USB traffic blocks are:
Reset
This includes hardware reset by pin RESET and software reset by the
HcSoftwareReset command (A9H). The reset function will clear all the HC’s
internal control registers to their reset status. After reset, the HCD must initialize
the ISP1161A USB HC by setting some registers.
Initialize HC
It includes:
Setting the physical size for the HC’s internal FIFO buffer RAM by setting the
HcITLBufferLength register (2AH - read, AAH - write) and the
HcATLBufferLength register (2BH - read, ABH - write)
Setting the HcHardwareConfiguration register according to requirements
Clearing interrupt events, if required
Enabling interrupt events, if required
Setting the HcFmInterval register (0DH - read, 8DH - write)
Setting the HC’s Root Hub registers
Setting the HcControl register to move the HC into USBOperational state
See also
Section 9.5
.
Entry
The normal entry point. The microprocessor returns to this point when there are
HC requests.
Need USB Traffic
USB devices need the HC to generate USB traffic when they have USB traffic
requests such as:
Connecting to or disconnecting from the downstream ports
Issuing the Resume signal to the HC
To generate USB traffic, the HCD must enter the USB transaction loop.
Prepare PTD data in
μ
P System RAM
The communication between the HCD and the ISP1161A HC is in the form of
Philips Transfer Descriptor (PTD) data. The PTD data provides USB traffic
information about the commands, status, and USB data packets.
Fig 24. ISP1161A HC USB transaction loop
MGT948
Need
USB traffic
Prepare PTD data in
μ
P system RAM
Initialize
HC
Transfer PTD data into
HC FIFO buffer RAM
HC performs USB transactions
via USB bus I/F
HC informs HCD of
USB traffic results
HC interprets
PTD data
Exit
Entry
HC state =
USBOperational
no
yes
Reset
相關PDF資料
PDF描述
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
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