參數(shù)資料
型號: ISP1161ABM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 104/134頁
文件大?。?/td> 587K
代理商: ISP1161ABM
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
104 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13.3.2
Unlock Device (B0H)
This command unlocks ISP1161A’s DC from write-protection mode after a ‘resume’.
In ‘suspend’ state all registers and FIFOs are write-protected to prevent data
corruption by external devices during a ‘resume’. Also, the register access for reading
is possible only after the ‘Unlock Device’ command is executed.
After waking up from ‘suspend’ state, the firmware must unlock the registers and
FIFOs via this command, by writing the unlock code (AA37H) into the Lock register.
The bit allocation of the Lock register is given in
Table 99
.
Code (Hex): B0 —
unlock the device
Transaction —
write 1 word (unlock code)
13.3.3
DcScratch register (R/W: B3H/B2H)
This command accesses the 16-bit DcScratch register, which can be used by the
firmware to save and restore information, e.g., the device status before powering
down in ‘suspend’ state. The register bit allocation is given in
Table 101
.
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
time-out error
babble error
unexpected end-of-packet
sent or received NAK (Not AcKnowledge)
sent Stall; a token was received, but the endpoint was stalled
overflow; the received packet was larger than the available buffer space
sent empty packet (ISO only)
bit stuffing error
sync error
wrong (unexpected) toggle bit in DATA PID; data was ignored
Table 98:
Error code
(Binary)
Transaction error codes
…continued
Description
Table 99:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Lock register: bit allocation
15
14
13
12
UNLOCKH[7:0]
0
W
4
UNLOCKL[7:0]
1
W
11
10
9
8
1
W
7
0
W
6
1
W
5
1
W
3
0
W
2
1
W
1
0
W
0
0
W
0
W
1
W
0
W
1
W
1
W
1
W
Table 100: Lock register: bit description
Bit
Symbol
15 to 0
UNLOCK[15:0]
Description
Sending data AA37H unlocks the internal registers and FIFOs
for writing, following a ‘resume’.
相關(guān)PDF資料
PDF描述
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller
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