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參數(shù)資料
| 型號(hào)： | IS42S16128-10T |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 256K X 16 SYNCHRONOUS DRAM, 10 ns, PDSO50 |
| 封裝： | 0.400 INCH, TSOP2-50 |
| 文件頁數(shù)： | 25/75頁 |
| 文件大?。?/td> | 638K |
| 代理商： | IS42S16128-10T |
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IS42S16128
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/13/00
25
Interval Between Read Command
A new command can be executed while a read cycle is in
progress, i.e., before that cycle completes. When the
second read command is executed, after the
CAS
latency
has elapsed, data corresponding to the new read com-
mand is output in place of the data due to the previous
read command.
The interval between two read command (t
CCD
) must be
at least one clock cycle.
The selected bank must be set to the active state before
executing this command.
CAS
latency = 2, burst length = 4
READ A0
READ B0
COMMAND
I/O
CLK
D
OUT
A0
D
OUT
B0
D
OUT
B1
D
OUT
B2
READ (CA=A, BANK 0) READ (CA=B, BANK 0)
t
CCD
D
OUT
B3
Interval Between Write Command
A new command can be executed while a write cycle is in
progress, i.e., before that cycle completes. At the point the
second write command is executed, data corresponding
to the new write command can be input in place of the data
for the previous write command.
The interval between two write commands (t
CCD
) must be
at least one clock cycle.
The selected bank must be set to the active state before
executing this command.
CAS
latency = 2, burst length = 4
WRITE A0
WRITE B0
COMMAND
I/O
CLK
D
IN
A0
D
IN
B0
D
IN
B1
D
IN
B2
D
IN
B3
WRITE (CA=A, BANK 0) WRITE (CA=B, BANK 0)
t
CCD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42S16128-12T | 128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16128-8T | Chassis Mount and Din Rail Filters RoHS Compliant: Yes |
| IS42S16160B-7TL | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S16160B-7TLI | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S16128-12T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16128-8T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16160A-6T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-6TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-7T | 制造商:Integrated Silicon Solution Inc 功能描述: |
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