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參數(shù)資料
| 型號： | INTELDX2 |
| 廠商： | Intel Corp. |
| 英文描述： | High-Performance 32-Bit Embedded Processor(高性能32位嵌入式處理器) |
| 中文描述： | 高性能32位嵌入式處理器（高性能32位嵌入式處理器） |
| 文件頁數(shù)： | 29/48頁 |
| 文件大?。?/td> | 486K |
| 代理商： | INTELDX2 |
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25
Embedded IntelDX2 Processor
4.0
ARCHITECTURAL AND
FUNCTIONAL OVERVIEW
The embedded IntelDX2 processor architecture is
essentially the same as the IntelDX2 processor.
Refer to the Embedded Intel486 Processor Family
Developer’s Manual for a description of the IntelDX2
processor.
Note that the embedded IntelDX2 processor has one
pin reserved for possible future use. This pin, an
input signal, is called RESERVED# and must be
connected to a 10-K
pull-up resistor. The pull-up
resistor must be connected only to the RESERVED#
pin.
Do not share this resistor with other pins
requiring pull-ups.
4.1
CPUID Instruction
The embedded IntelDX2 processor supports the
CPUID instruction (see Table 13). Because not all
Intel processors support the CPUID instruction, a
simple test can determine if the instruction is
supported. The test involves the processor’s ID Flag,
which is bit 21 of the EFLAGS register. If software
can change the value of this flag, the CPUID
instruction is available. The actual state of the ID
Flag bit is irrelevant and provides no significance to
the hardware. This bit is cleared (reset to zero) upon
device reset (RESET or SRESET) for compatibility
with Intel486 processor designs that do not support
the CPUID instruction.
CPUID-instruction details are provided here for the
embedded IntelDX2 processor. Refer to Intel Appli-
cation Note AP-485
Intel Processor Identification
with the CPUID Instruction
(Order No. 241618) for a
description that covers all aspects of the CPUID
instruction and how it pertains to other Intel
processors.
4.1.1
Operation of the CPUID Instruction
The CPUID instruction requires the software
developer to pass an input parameter to the
processor in the EAX register. The processor
response is returned in registers EAX, EBX, EDX,
and ECX.
Vendor ID String
- When the parameter passed in EAX is 0 (zero), the register values returned upon
instruction execution are shown in the following table.
The values in EBX, EDX and ECX indicate an Intel processor. When taken in the proper order, they decode to
the string “
GenuineIntel
.”
Table 13. CPUID Instruction Description
OP CODE
Instruction
Processor
Core Clocks
Parameter passed in
EAX
(Input Value)
Description
0F A2
CPUID
9
0
Vendor (Intel) ID String
14
1
Processor Identification
9
> 1
Undefined (Do Not Use)
31-------------24
23-----------16
15--------------8
7--------------0
High Value (= 1)
EAX
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 1
Vendor ID String
EBX
u
(75)
n
(6E)
e
(65)
G
(47)
(ASCII
EDX
I
(49)
e
(65)
n
(6E)
i
(69)
Characters)
ECX
l
(6C)
e
(65)
t
(74)
n
(6E)
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