參數(shù)資料
型號： IDT82V3280DQG8
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 97/171頁
文件大?。?/td> 0K
描述： IC PLL WAN SE STRATUM 2 100-TQFP
標(biāo)準(zhǔn)包裝： 750
類型： 時(shí)鐘/頻率發(fā)生器，多路復(fù)用器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH，Stratum
輸入： CMOS，LVDS，PECL
輸出： CMOS，LVDS，PECL
電路數(shù)： 1
比率 - 輸入:輸出： 14:9
差分 - 輸入:輸出： 是/是
頻率 - 最大： 622.08MHz
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
其它名稱： 82V3280DQG8
IDT82V3280
WAN PLL
Functional Description
31
December 9, 2008
3.9
SELECTED INPUT CLOCK STATUS VS. DPLL
OPERATING MODE
The operating modes supported by T0 DPLL are more complex than
the ones supported by T4 DPLL for T0 path is the main one. T0 DPLL
supports three primary operating modes: Free-Run, Locked and Hold-
over, and three secondary, temporary operating modes: Pre-Locked,
Pre-Locked2 and Lost-Phase. T4 DPLL supports three operating
modes: Free-Run, Locked and Holdover. The operating modes of T0
DPLL and T4 DPLL can be switched automatically or by force, as con-
trolled by the T0_OPERATING_MODE[2:0] / T4_OPERATING_
MODE[2:0] bits respectively.
When the operating mode is switched by force, the operating mode
switch is under external control and the status of the selected input clock
takes no effect to the operating mode selection. The forced operating
mode switch is applicable for special cases, such as testing.
When the operating mode is switched automatically, the internal
state machines for T0 and for T4 automatically determine the operating
mode respectively.
3.9.1
T0 SELECTED INPUT CLOCK VS. DPLL OPERATING
MODE
The T0 DPLL operating mode is controlled by the
T0_OPERATING_MODE[2:0] bits, as shown in Table 15:
When the operating mode is switched automatically, the operation of
the internal state machine is shown in Figure 7.
Whether the operating mode is under external control or is switched
automatically, the current operating mode is always indicated by the
T0_DPLL_OPERATING_MODE[2:0] bits. When the operating mode
switches, the T0_OPERATING_MODE 1 bit will be set. If the
T0_OPERATING_MODE 2 bit is ‘1’, an interrupt will be generated.
Table 15: T0 DPLL Operating Mode Control
T0_OPERATING_MODE[2:0]
T0 DPLL Operating Mode
000
Automatic
001
Forced - Free-Run
010
Forced - Holdover
100
Forced - Locked
101
Forced - Pre-Locked2
110
Forced - Pre-Locked
111
Forced - Lost-Phase
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IDT82V3280EQG 功能描述:IC PLL WAN SE STRATUM 2 100TQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
IDT82V3280EQG8 制造商:Integrated Device Technology Inc 功能描述:IC PLL WAN SE STRATUM 2 100TQFP
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IDT82V3280PF 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL
IDT82V3280PFBLANK 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL
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