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參數(shù)資料
型號: IDT82P2521BH
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 9/147頁
文件大?。?/td> 0K
描述: IC LIU E1 21+1CH SHORT 640-PBGA
標準包裝: 5
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 640-BGA 裸露焊盤
供應商設備封裝: 640-PBGA-EP(31x31)
包裝: 托盤
其它名稱: 82P2521BH
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
Programming Information
106
December 7, 2005
INTM0 - Interrupt Mask Register 0
Address: 01BH, 05BH, 09BH, 0DBH, 11BH, 15BH, 19BH, 1DBH, (CH1~CH8)
21BH, 25BH, 29BH, 2DBH, 31BH, 35BH, 39BH, 3DBH, (CH9~CH16)
41BH, 45BH, 49BH, 4DBH, 51BH, (CH17~CH21)
7DBH (CH0)
Type: Read / Write
Default Value: FFH
Bit
Name
Description
7
DAC_IM
This bit is the waveform amplitude overflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
6
TJA_IM
This bit is the TJA FIFO overflow and underflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
5
RJA_IM
This bit is the RJA FIFO overflow and underflow interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
4
TOC_IM
This bit is the Line Driver TOC interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
3
TCKLOS_IM
This bit is the TCLKn missing interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
2
TLOS_IM
This bit is the TLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
1
SLOS_IM
This bit is the SLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
0
LLOS_IM
This bit is the LLOS interrupt mask.
0: Interrupt is enabled.
1: Interrupt is masked. (default)
7
654
32
1
0
DAC_IM
TJA_IM
RJA_IM
TOC_IM
TCKLOS_IM
TLOS_IM
SLOS_IM
LLOS_IM
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