參數(shù)資料
型號： IBM025160
廠商： IBM Microeletronics
英文描述： 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
中文描述： 4Mb的（256 × 16）多端口視頻內(nèi)存（4分位（256 × 16）多端口視頻內(nèi)存）
文件頁數(shù)： 61/65頁
文件大?。?/td> 841K
代理商： IBM025160
IBM025160
IBM025161
IBM025170
IBM025171
256K X 16 MULTIPORT VIDEO RAM
33G0307
SA14-4751-05
Revised 3/98
IBM Corporation, 1995. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 61 of 65
Split Register Write Transfer (SRS) Mode
The Split Register Write Transfer is used to write data continuously in the Serial port. This transfer operation
stores 128 x16 bits from SAM to the selected segment in a row specified by (RA
8
-RA
0
) at RE fall time and
CA
7
at CE fall time during the transfer cycle.The Serial port counter reading at the time of transfer determines
the location of the segment in the selected row for the data transfer. The Split Register Write Transfer in SRS
mode is illustrated in the timing diagram on page 62. The first example illustrates a Split Register Write Trans-
fer between SAM and DRAM based on CA
7
and the status of which half of SAM is active and which half is
inactive. In the example, user supplied address bit CA
7
is “1” and the upper half of SAM is active (data being
written in that half) while the lower half of SAM is idling. Therefore, data from the lower half of SAM is forced
to the upper quarter of the lower half of the selected row.
Note that the data in the lower half of SAM is
associated with row locations that have physical address bit CA
8
equal to “0”, while the data in the
upper half of SAM is associated with the row locations that have physical address bit CA
8
equal to
“1”
. The user supplied address bits CA
6
- CA
0
are stored in the TAP address register during the transfer
cycle. When the Serial port counter reaches the STOP address, the start address is loaded with the contents
of TAP address register. At the same time, the Serial port counter is updated with the new start address. The
writing of data in the previously inactive half of SAM will start from this new start address at the next SC clock.
相關(guān)PDF資料
PDF描述
IBM025161 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
IBM025170 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
IBM025171 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
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IBM038329NP6B 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動態(tài)RAM（帶內(nèi)置的圖形性能）)
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