參數(shù)資料
型號(hào)： IBM025160
廠商： IBM Microeletronics
英文描述： 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
中文描述： 4Mb的（256 × 16）多端口視頻內(nèi)存（4分位（256 × 16）多端口視頻內(nèi)存）
文件頁(yè)數(shù)： 3/65頁(yè)
文件大?。?/td> 841K
代理商： IBM025160
IBM025160
IBM025161
IBM025170
IBM025171
256K X 16 MULTIPORT VIDEO RAM
33G0307
SA14-4751-05
Revised 3/98
IBM Corporation, 1995. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 3 of 65
Detailed Pin Description
RE - Row Enable; also known as RAS
This pin is functionally equivalent to a chip enable signal in that whenever it is activated, 8192 storage cells of
the selected row are sensed simultaneously and the sense amplifiers restore all data. The falling edge of RE
latches data on address pins A
0
-A
8
. CE, TRG, W, and DSF are simultaneously latched to invoke the DRAM
port and Serial port operations.
CE - Column Enable (Dual WE parts only); also known as CAS.
This pin serves as a chip select signal. It activates the column decoder and the I/O buffer. The falling edge of
CE latches the column address A
0
-A
8
. State of DSF at falling edge of CE invokes various DRAM port and
Serial port functions.
LCE, UCE - Lower and Upper Column Enable (Dual CE parts only).
These pins enable lower and upper byte respectively of the selected column for Read/Write. The falling edge
of either LCE or UCE latches the column address and state of DSF to invoke various DRAM port and Serial
port functions.
W - Write (Dual CE parts only)
This pin enables the DRAM port write circuitry. It is also used as a control input pin to define the various oper-
ations at RE fall time.
LW, UW - Lower and Upper Write (Only in Dual W parts)
These pins enable the DRAM port write circuitry for Lower and Upper Byte Write respectively. Either LW or
UW being low is considered low for Write cycles.
TRG - Data Transfer and Output Enable (DT/OE)
This is a multifunctional input pin. In conjunction with LW/UW, DSF and CE, it either enables the DRAM data
outputs or enables transfer operations between DRAM and SAM. This is also used as a control input pin to
define the various operating modes at RE time.
DSF - Designated Special Function
A control pin used in conjunction with other control pins to define the various operating modes at RE and CE
time.
A
0
- A
8
- Address Inputs
These pins are multiplexed as row and column address inputs. Row addresses are first used to select one of
the possible 512 rows for a Read, Write, Data Transfer, or Refresh cycles. Column addresses are then sup-
plied to select one of the possible 512 columns for a Read or a Write cycle or one of the possible 256 starting
locations for the next Serial Read/Write cycle for the Serial port.
相關(guān)PDF資料
PDF描述
IBM025161 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
IBM025170 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
IBM025171 4Mb（256K X 16） MULTIPORT VIDEO RAM(4M位（256K X 16）多端口視頻RAM)
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