參數(shù)資料
型號(hào): HSP50214BVI
廠商: HARRIS SEMICONDUCTOR
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Programmable Downconverter
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP120
文件頁(yè)數(shù): 1/60頁(yè)
文件大?。?/td> 573K
代理商: HSP50214BVI
TM
3-1
HSP50214B
Programmable Downconverter
The HSP50214B Programmable Downconverter converts
digitized IF data into filtered baseband data which can be
processed by a standard DSP microprocessor. The
Programmable Downconverter (PDC) performs down
conversion, decimation, narrowband low pass filtering, gain
scaling, resampling, and Cartesian to Polar coordinate
conversion.
The 14-bit sampled IF input is down converted to baseband
by digital mixers and a quadrature NCO, as shown in the
Block Diagram. A decimating (4 to 32) fifth order Cascaded
Integrator-Comb (CIC) filter can be applied to the data
before it is processed by up to 5 decimate-by-2 halfband
filters. The halfband filters are followed by a 255-tap
programmable FIR filter. The output data from the
programmable FIR filter is scaled by a digital AGC before
being re-sampled in a polyphase FIR filter. The output
section can provide seven types of data: Cartesian (I, Q),
polar (R,
θ
), filtered frequency (d
θ/
dt), Timing Error (TE), and
AGC level in either parallel or serial format.
Features
Up to 65 MSPS Front-End Processing Rates (CLKIN) and
55MHz Back-End Processing Rates (PROCCLK)
Clocks May Be Asynchronous
Processing Capable of >100dB SFDR
Up to 255-Tap Programmable FIR
Overall Decimation Factor Ranging from 4 to 16384
Output Samples Rates to
12.94 MSPS with Output
Bandwidths to
982kHz Lowpass
32-Bit Programmable NCO for Channel Selection and
Carrier Tracking
Digital Resampling Filter for Symbol Tracking Loops and
Incommensurate Sample-to-Output Clock Ratios
Digital AGC with Programmable Limits and Slew Rate to
Optimize Output Signal Resolution; Fixed or Auto Gain
Adjust
Serial, Parallel, and FIFO 16-Bit Output Modes
Cartesian to Polar Converter and Frequency Discriminator
for AFC Loops and Demodulation of AM, FM, FSK, and
DPSK
Input Level Detector for External I.F. AGC Support
Applications
Single Channel Digital Software Radio Receivers
Base Station Rx’s: AMPS, NA TDMA, GSM, and CDMA
Compatible with HSP50210 Digital Costas Loop for PSK
Reception
Evaluation Platform Available
Block Diagram
Ordering Information
PART
NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
HSP50214BVC
0 to 70
120 Ld MQFP
Q120.28x28
HSP50214BVI
-40 to 85
120 Ld MQFP
Q120.28x28
HALFBAND
FILTERS
POLYPHASE
FIR AND
I
S
LEVEL DETECT
CARRIER
NCO
5
TH
CARTESIAN
TO
POLAR
COORDINATE
CONVERTER
O
DISCRIMINATOR
AGC LOOP FILTER
MAG.
PHASE
RESAMPLING
NCO
I OUT
Q OUT
FREQ
AGC
TIMING ERROR
IN(13:0)
REFCLK
SEROUTA
SEROUTB
AOUT(15:0)
BOUT(15:0)
CONTROL
C(7:0)
MICROPROCESSOR
READ/WRITE
GAIN
ADJ
(2:0)
H
F
FILTER
CIC
ORDER
H
F
HALFBAND
FILTERS
POLYPHASE
FIR AND
COF
SOF
CLKIN
PROCCLK
2
F
2
F
5
TH
FILTER
CIC
ORDER
Data Sheet
May 2000
File Number
4450.3
[ /Title
(HSP5
0214B)
/Sub-
ject
(Pro-
gram-
mable
Down-
con-
verter)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
Down-
con-
verter,
Down
Con-
verter,
Pro-
gram-
mable
Down-
con-
verter,
DSP,
AMPS,
TDMA
, North
Ameri-
can
TDMA
,GSM,
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil and Design is a trademark of Intersil Corporation.
Copyright
Intersil Corporation 2000
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