參數(shù)資料
型號(hào): GS8182S18GBD-200I
廠商: GSI TECHNOLOGY
元件分類: SRAM
英文描述: 1M X 18 DDR SRAM, 0.45 ns, PBGA165
封裝: 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, MO-216CAB-1, FPBGA-165
文件頁(yè)數(shù): 20/36頁(yè)
文件大?。?/td> 339K
代理商: GS8182S18GBD-200I
Preliminary
GS8182S08/09/18BD-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00a 6/2007
27/36
2007, GSI Technology
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents
Not Used
GSI Technology
JEDEC Vendor
ID Code
Presence
Register
Bit # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8765 432 1
0
XX XXXXXX XXXXXX XXXXXX 0
0 0 1101 100 1
1
Instruction Register
ID Code Register
Boundary Scan Register
0
1
2
0
31 30 29
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
108
1
0
Control Signals
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參數(shù)描述
GS8182S36BD-167 制造商:GSI Technology 功能描述:512K X 36 (18 MEG) BURST OF 2 - Trays
GS8182S36BD-167I 制造商:GSI Technology 功能描述:512K X 36 (18 MEG) BURST OF 2 - Trays
GS8182S36BD-200 制造商:GSI Technology 功能描述:512K X 36 (18 MEG) BURST OF 2 - Trays
GS8182S36BD-200I 制造商:GSI Technology 功能描述:512K X 36 (18 MEG) BURST OF 2 - Trays
GS8182S36BD-250 制造商:GSI Technology 功能描述:512K X 36 (18 MEG) BURST OF 2 - Trays