參數(shù)資料
型號: GPTRM
英文描述: General-Purpose Timer Reference Manual
中文描述: 通用定時器參考手冊
文件頁數(shù): 79/90頁
文件大?。?/td> 647K
代理商: GPTRM
GPT
REFERENCE MANUAL
MEMORY MAP AND REGISTERS
MOTOROLA
A-3
PAB — Priority Adjust Bits
The GPT has 11 sources capable of generating an interrupt. These bits specify the sin-
gle interrupt source which is to be advanced to the highest priority level. All of the other
interrupt sources maintain their relative priority.
X = 4-bit Vector Base Address (VBA)
IRL — Interrupt Request Level
These bits specify the priority level of the GPT interrupts. The GPT can have any of
eight priority levels, level 7 being the highest and level 0 disabling interrupts. The in-
terrupt request level specifies the priority level presented to the CPU. The interrupt re-
quest level is initialized to zero during reset.
All GPT internal interrupts are prioritized as shown in the above table. The interrupt
with the highest priority generates the interrupt level to the IMB specified by this field.
VBA — Vector Base Address
This field specifies the most significant nibble of all the vector numbers that can be
generated by the different interrupt sources of the GPT module. This value concate-
nated with the vector address shown in the above table is the module interrupt vector.
DDRx — Data Direction for Input Capture/Output Compare Pins
0 = Input only
1 = Output
IC4/OC5, OC[4:1], IC[3:1] — Parallel Data Port
Interrupt Source
Priority Level
Vector Number
Name
IC1
IC2
IC3
OC1
OC2
OC3
OC4
IC4/OC5
TOF
PAOVF
PAIF
Function
Adjusted Channel
Input Capture 1
Input Capture 2
Input Capture 3
Output Compare 1
Output Compare 2
Output Compare 3
Output Compare 4
Input Capture 4/Output Compare 5
Timer Overflow Flag
Pulse Accumulator Overflow Flag
Pulse Accumulator Input Flag
0 (Highest)
1
2
3
4
5
6
7
8
9
10
11 (Lowest)
$X0
$X1
$X2
$X3
$X4
$X5
$X6
$X7
$X8
$X9
$XA
$XB
PDDR/PDR —
Parallel Data Direction Register/Parallel Data Register
$YFF906
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DDRI4O5 DDRO4 DDRO3 DDRO2 DDRO1
DDRI3
DDRI2
DDRI1
IC4/OC5
OC4
OC3
OC2
OC1
IC3
IC2
IC1
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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