參數(shù)資料
型號: FUSB2805MLX
廠商: Fairchild Semiconductor
文件頁數(shù): 43/49頁
文件大?。?/td> 0K
描述: TXRX USB2.0 HS OTG ULPI 32MLP
標準包裝: 1
系列: *
其它名稱: FUSB2805MLXFSDKR
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
48
F
USB2
8
0
5
USB2
.0
High
-S
pee
d
OTG
Tra
nsc
e
iv
e
rw
ith
UL
P
I
Inter
fac
e
Physical Dimensions
5.10
4.90
0.80 MAX
0.10 C
SEATING PLANE
0.08 C 0.05
0.00
(0.20)
SIDE VIEW
C
(2X)
0.15 C
(2X)
PIN #1 IDENT
TOP VIEW
0.50
PIN #1 IDENT
3.20
3.00
0.50
0.30
3.20
3.00
0.50
0.10
C A B
0.05
C
0.18-0.30
BOTTOM VIEW
A
B
1
8
9
16
17
24
25
32
5.25 MIN
(0.21 )
(3.75 )
3.10 MAX
0.28 MAX
0.50
(0.60 )
RECOMMENDED LAND PATTERN
X4
X32
32X
(DATUM B)
(DATUM A)
(0.48 )
NOTES:
A. EXCEPT WHERE NOTED, CONFORMS TO JEDEC REGISTRATION
MO-220, VARIATION WHHD-6.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994.
D. LAND PATTERN PER IPC SM-782.
E. DIMENSIONS ARE NOT INCLUSIVE OF BURRS, MOLD FLASH, OR
TIE BAR PROTRUSIONS.
F. DRAWING FILENAME: MKT-MLP32Brev1.
32X
5.10
4.90
3.10 MAX
(3.75)
5.25 MIN
0.4
9
A
Figure 23.
32-Lead, Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always v
isit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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