FMS9875
PRODUCT SPECIFICATION
REV. 1.2.15 1/14/02
9
Functional Description
There are two major sections within the FMS9875:
1.
Analog-to-digital Converter Channels, one for each
channel, GY, RP, BP and the voltage reference.
2.
Timing and Control comprising the PLL, Timing
Generator, Sync Stripper and Serial Interface.
A/D Converter Channels
Each of the RGB/YP
B
P
R
channels consists of:
1.
A clamp to set the lower reference of each G/Y, B and R
channel or the midpoint reference of the P
B
and P
R
channels.
2.
Gain and offset stages to match the A/D converter range
to input signal levels.
3.
An Analog-to-Digital Converter to digitize the analog
input.
A plot of output codes versus input voltage has a staircase-
like shape. With FMS9875 Gain and Offset register values
set to match a nominal 700 mV input, Tables 1 and 2 show
the output codes in deciminal and binary, corresponding to
the mid-point input voltages of each step.
Note:
1.
The midpoint of code 000 lies 1/2 of one code-size
below the 000/001 transition.
2.
The midpoint of code 255 lies 1/2 of one code-size
above the 254/255 transition.
3.
For AC coupled inputs, during the blanking period:
a) Y, G, B and R inputs should be clamped to the
FMS9875 bottom reference.
b) P
B
and P
R
inputs should be clamped to the FMS9875
mid-range level. (Half the range plus the offset
voltage)
Table 1. YP
B
P
R
and GBR Decimal Output Coding
Table 2. YP
B
P
R
and GBR Binary Output Coding
Input (mV)
700
697.25
Y, G, B, R
255
254
P
B
, P
R
Offset Binary
255
254
Two’s Complement
127
126
351.37
348.63
345.88
128
127
126
128
127
126
000
255
254
2.75
0
001
000
001
000
129
128
Input (mV)
Y, G, B, R
1111 1111
1111 1110
P
B
, P
R
Two’s Complement
0111 1111
0111 1110
350 mV ref.
700
697.25
0 mV ref.
350
347.25
Offset Binary
1111 1111
1111 1110
351.37
348.63
345.88
1.37
-1.37
-4.12
1000 0000
0111 1111
0111 1110
1000 0000
0111 1111
0111 1110
0000 0000
1111 1111
1111 1110
2.75
0
-347.25
-350
0000 0001
0000 0000
0000 0001
0000 0000
1000 0001
1000 0000