參數(shù)資料
型號: FMS988AKAC140
英文描述: Signal Conditioner
中文描述: 信號調(diào)理
文件頁數(shù): 7/29頁
文件大?。?/td> 481K
代理商: FMS988AKAC140
FMS9875
PRODUCT SPECIFICATION
REV. 1.2.15 1/14/02
7
PLL Configuration Register (0C)
Configuration Register 2 (0D)
Bit no.
Name
0
3-1
REV
4
OUTPHASE
Bit no.
1-0
4-2
Name
IPUMP
2-0
Type
Description
R/W
Charge Pump Current.
Selects Charge Pump current (μA).
000:
50
001:
100
010:
150
011:
250
100:
350
101:
500
110:
750
111:
1500
VCO Frequency Range.
Selects VCO frequency range (MHz).
00:
10–40
01:
10–70
10:
20–120
11:
20–150
Reserved.
0:
Run.
1:
(reserved).
6-5
FVCO
1-0
R/W
7
R/W
Type
R
R/W
Description
Reserved.
Set to 0.
Revision Number.
Die revision number.
Output Data Phase.
In the alternate pixel mode, selects either odd (1, 3, 5, …)
or even (2, 4, 6 ….) samples following the HSYNC leading edge to be emitted
from output data ports.
0:
Even samples
1:
Odd samples
P
B
P
R
Data Output Format.
0:
Offset binary.
1:
Two’s complement.
P
B
P
R
Data Output Timing.
0:
P
B
data first, P
R
data second.
1:
P
R
data first, P
B
data second.
Output Data Format.
0:
444
1:
422 with P
B
P
R
multiplexed onto the DBP
7-0
output.
5
TWOS
R/W
6
PRFIRST
R/W
7
422
R/W
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