參數(shù)資料
型號(hào): ES29DL400E-12RTG
廠商: 優(yōu)先(蘇州)半導(dǎo)體有限公司
英文描述: 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory
中文描述: 32兆(4米× 8/2M × 16),3.0伏的CMOS只,引導(dǎo)扇區(qū)閃存
文件頁(yè)數(shù): 33/59頁(yè)
文件大?。?/td> 603K
代理商: ES29DL400E-12RTG
ESI
33
Rev. 2D Jan 5, 2006
ES29LV320D
Excel Semiconductor inc.
If additional sectors are selected for erasure, the
entire time-out also applies after each additional
sector erase command. When the time-out period is
complete, DQ3 switches from a “0” to a”1”. If the
time between additional sector erase commands
from the system can be assumed to be less than
50us
, the system need not monitor DQ3. See also
the Sector Erase Command Sequence section. After
the sector erase command is written, the system
should read the status of DQ7 (Data# Polling) or
DQ6 (Toggle Bit I) to ensure that the device has
accepted the command sequence, and then read
DQ3. If DQ3 is “1”, the Embedded Erase algorithm
has begun; all further commands (except Erase Sus-
pend) are ignored until the erasure operation is com-
plete. If DQ3 is “0”, the device will accept additional
sector erase commands. To ensure the command
has been accepted, the system software should
check the status of DQ3 prior to and following each
subsequent sector erase command. If DQ3 is high
on the second status check, the last command might
not have been accepted. In Table 10, DQ3 status
operation is well defined and summarized with other
status bits, DQ7, DQ6, DQ5, and DQ2.
DQ5 ( EXCEEDED TIMING LIMITS )
DQ5 indicates whether the program or erase time
has exceeded a specified internal pulse count limit.
Under these conditions DQ5 produces a “1”, indi-
cating that the program or erase cycle was not suc-
cessfully completed. The device may output a “1”
on DQ5 if the system tries to program a “1” to a
location that was previously programmed to “0”
Only an erase operation can change a “0” back to a
“1”. Under this condition, the device halts the opera-
tion, and when the timing limit has been exceeded,
DQ5 produces a ”1”. Under both these conditions,
the system must write the reset command to return
to the read mode.
DQ3 ( SECTOR ERASE TIMER )
After writing a sector erase command sequence,
the system may read DQ3 to determine whether or
not erasure has begun. (The sector erase time
does not apply to the chip erase command.)
Table 10. Write Operation Status
Notes :
1. DQ5 switches to “1” when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. Refer to the
section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
Status
DQ7
(Note 2)
DQ6
DQ5
(Note 1)
DQ3
DQ2
(Note 2)
RY/
BY#
Standard
Mode
Embedded Program Algorithm
DQ7#
Toggle
0
N/A
No toggle
0
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
0
Erase Sus-
pend Mode
Erase-Suspend-
Read
Erase Suspended
Sector
1
No toggle
0
N/A
Toggle
1
Non-Erase
Suspended Sector
Data
Data
Data
Data
Data
1
Erase-Suspend-Program
DQ7#
Toggle
0
N/A
N/A
0
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